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S1C63567 Datasheet(PDF) 9 Page - Epson Company |
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S1C63567 Datasheet(HTML) 9 Page - Epson Company |
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9 / 16 page  9 S1C63567 ● Serial Interface AC Characteristics Clock Synchronous Master Mode • During 32 kHz operation Characteristic Transmitting data output delay time Receiving data input set-up time Receiving data input hold time Symbol tsmd tsms tsmh Unit µS µS µS Max. 5 Typ. Min. 10 5 (Condition: VDD=3.0V, VSS=0V, Ta=-20 to 70 °C, VIH1=0.8VDD, VIL1=0.2VDD, VOH=0.8VDD, VOL=0.2VDD) • During 1 MHz operation Characteristic Transmitting data output delay time Receiving data input set-up time Receiving data input hold time Symbol tsmd tsms tsmh Unit nS nS nS Max. 200 Typ. Min. 400 200 Note that the maximum clock frequency is limited to 1 MHz. (Condition: VDD=3.0V, VSS=0V, Ta=-20 to 70 °C, VIH1=0.8VDD, VIL1=0.2VDD, VOH=0.8VDD, VOL=0.2VDD) Clock Synchronous Slave Mode • During 32 kHz operation Characteristic Transmitting data output delay time Receiving data input set-up time Receiving data input hold time Symbol tssd tsss tssh Unit µS µS µS Max. 10 Typ. Min. 10 5 (Condition: VDD=3.0V, VSS=0V, Ta=-20 to 70 °C, VIH1=0.8VDD, VIL1=0.2VDD, VOH=0.8VDD, VOL=0.2VDD) • During 1 MHz operation Characteristic Transmitting data output delay time Receiving data input set-up time Receiving data input hold time Symbol tssd tsss tssh Unit nS nS nS Max. 500 Typ. Min. 400 200 Note that the maximum clock frequency is limited to 1 MHz. (Condition: VDD=3.0V, VSS=0V, Ta=-20 to 70 °C, VIH1=0.8VDD, VIL1=0.2VDD, VOH=0.8VDD, VOL=0.2VDD) <Master mode> SCLK OUT SOUT SIN VOH VOH VOL tsms tsmh tsmd VIH1 VIL1 VOL <Slave mode> SCLK IN SOUT SIN VIH1 VOH VOL tsss tssh tssd VIH1 VIL1 VIL1 |
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