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MGA-64606-TR1G Datasheet(PDF) 1 Page - AVAGO TECHNOLOGIES LIMITED |
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MGA-64606-TR1G Datasheet(HTML) 1 Page - AVAGO TECHNOLOGIES LIMITED |
1 / 20 page MGA-64606 Low Noise Amplifier with switchable Bypass/Shutdown Mode in Low Profile Package Data Sheet Description Avago Technologies’ MGA-64606 is an economical, easy-to-use GaAs MMIC Low Noise Amplifier (LNA) with Bypass/ Shutdown mode. The LNA has low noise and high linearity achieved through the use of Avago Technologies’ proprietary 0.25 m GaAs Enhancement-mode pHEMT process. The Bypass/Shutdown mode enables the LNA to be bypassed during high input signal power and reduce current consumption. It is housed in a low profile 2.0 x 1.3 x 0.5mm3 6-pin Ultra Thin Package. The compact footprint and low profile coupled with low noise, high linearity make the MGA-64606 an ideal choice as a low noise amplifier for mobile receiver in the WiMAX, WLAN(802.11b/g), WiBro and DMB applications. Component Image 2.0 x 1.3 x 0.5 mm3 6-lead Ultra Thin Package Note: Package marking provides orientation and identification “64” = Product Code “X” = Month Code Features Low current consumption Adjustable bias current 1.5 GHz – 3 GHz operating range Low Noise Figure Low current consumption in Bypass Mode, <100 A Fully matched to 50 ohm in Bypass Mode High Linearity (LNA and Bypass Mode) Low profile package Typical Performance 2.4 GHz; 3V , 7mA (Typ): 15.3 dB Gain 0.95 dB Noise Figure +5.0 dBm Input IP3 -3.0 dBm Input Power at 1 dB gain compression 3.8 dB Insertion Loss in Bypass Mode 12 dBm IIP3 in Bypass Mode (Pin = -20 dBm) <100 A current consumption in Bypass mode Applications Low noise amplifier for GPS, WiMAX, WLAN, WiBro and DMB applications. Other ultra low noise applications in the 1.5 – 3 GHz band. Simplified Schematic Attention: Observe precautions for handling electrostatic sensitive devices. ESD Machine Model = 60 V ESD Human Body Model = 300 V Refer to Avago Application Note A004R: Electrostatic Discharge, Damage and Control. 64X Pin Configuration Pin 1 (Vbias) Pin 3 (Gnd) Pin 6 (Vsd) Pin 5 (RFOut) Pin 4 (Vdd) GND Pin 2 (RFin) TOP VIEW R RF INRF OUT LNA VBias Control VSD L C C L Vdd 1 2 3 4 5 6 R L Bias / |
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