3

and schematic.

Symbol

Parameter and Test Condition

Units

Min.

Typ.

Max.

LNA Mode performance ( Vdd = 3 V,Vbias = 1.8 V & VSD = 0 V)

Idd

Bias Current

mA

–

7

11

Gain

Gain

dB

14

15.3

17

NF

Noise Figure

dB

–

0.95

1.2

IIP3

Input Third Order Intercept Point

dBm

–

+5.0

–

IP1dB

Input Power at 1 dB Gain Compression

dBm

–

-3.0

–

S11

Input Return Loss, 50

 source

dB

–

-11

–

S22

Output Return Loss, 50

 load

dB

–

-12

–

S12

Reverse Isolation

dB

–

-23

–

BYPASS Mode performance ( Vdd = 3 V,Vbias = 0 V & VSD = 0 V)

Bypass Mode Insertion Loss

dB

–

3.8

–

Bypass Mode IIP3 (Tested at -20 dBm input Power)

dBm

–

12

–

Bypass Mode Current

A

–65

–

Shutdown Mode performance ( Vdd = 3 V,Vbias = 0 V & VSD = 3 V)

Shutdown Mode Isolation

dB

–

16

–

Shutdown Mode Current

A

–

100

–

Note:

Table 1. LNA Switch Truth Table

Vbias (V) / Vsd (V)

Vdd (V)

Mode

3

LNA

3

BYPASS

3

SHUTDOWN

Notes:

1. Device operation in LNA mode if Vbias > 1.5 V and VSD < 0.5 V. Bias current of LNA can be varied

with different values of Vbias for Vbias > 1.5 V. See Fig 5 below.

2. Device operation in BYPASS mode if Vbias < 0.3 V and VSD < 0.5 V.

3. Device is shutdown if Vsd > 2.2 V. In SHUTDOWN mode, LNA and internal Bypass switch is

turned OFF. SHUTDOWN mode overrides Vbias voltage setting. Pin 6 (Vsd) is a Pull-Down logic

function pin and recommend to ground it if shutdown function is not used in application.