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S1C88649 Datasheet(PDF) 9 Page - Epson Company |
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S1C88649 Datasheet(HTML) 9 Page - Epson Company |
9 / 20 page 9 S1C88649 2. Write cycle Item Symbol Min. Typ. Max. Unit Address set-up time in write cycle Address hold time in write cycle Write signal pulse width Data output set-up time in write cycle Data output hold time in write cycle twas twah twp twds twdh ns ns ns ns ns Note 1 1 Note) 1 (Condition: VDD=1.8 to 3.6V, VSS=0V, Ta=25 °C, VIH1=0.8VDD, VIL1=0.2VDD, VIH2=1.6V, VIL2=0.6V, VOH=0.8VDD, VOL=0.2VDD, CL=100pF(load capacitance)) Substitute the number of states for wait insertion in n. tc-180 th-80 tl-40+n•tc/2 tc-180+n•tc/2 th-80 th+80 ICLK A00–A18 CE RD DIN VIH2 VIL2 tc th tl VOH VOL VOH VOL tras trah trdh trds VIH1 VIL1 trp * ** A00–A18 CE WR DOUT VOH VOL VOH VOL twas twah twdh twds VIH1 VIL1 twp ∗ In the case of crystal oscillation and ceramic oscillation: th = 0.5tc ± 0.05tc, tl = tc - th (1/tc: oscillation frequency) ∗ In the case of CR oscillation: th = 0.5tc ± 0.10tc, tl = tc - th (1/tc: oscillation frequency) Serial interface 1. Clock synchronous master mode Item Symbol Min. Typ. Max. Unit Transmitting data output delay time Receiving data input set-up time Receiving data input hold time tsmd tsms tsmh ns ns ns Note 500 200 200 (Condition: VDD=1.8 to 3.6V, VSS=0V, Ta=25 °C, VIH1=0.8VDD, VIL1=0.2VDD, VOH=0.8VDD, VOL=0.2VDD) 2. Clock synchronous slave mode Item Symbol Min. Typ. Max. Unit Transmitting data output delay time Receiving data input set-up time Receiving data input hold time tssd tsss tssh ns ns ns Note 200 200 500 (Condition: VDD=1.8 to 3.6V, VSS=0V, Ta=25 °C, VIH1=0.8VDD, VIL1=0.2VDD, VOH=0.8VDD, VOL=0.2VDD) |
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