bq26500

SLUS567A − JUNE, 2003 − REVISED OCTOBER 2003

3

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ELECTRICAL CHARACTERISTICS(continued)

TJ = −20°C to 70°C, TJ = TA, 2.6 V ≤ VCC ≤ 4.5 V (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

TIME MEASUREMENT

fOSC

Internal oscillator frequency

−3.5%

+1.0%

+2.5%

fOSC

Internal oscillator frequency

TA = 0°C to 50°C

−2.5%

+1.0%

+2.5%

CAPACITY MEASUREMENT

Voltage-to-frequency converter offset

15

µV

Voltage-to-frequency converter gain

variabilty(3)

1%

Voltage-to-frequency input

(VSRP − VSRN)

−100

100

mV

EEPROM PROGRAMMING (VCC ≥ 3.0 V, 20°C ≤ TA ≤ 35°C)(1)

tRISE

Programming voltage rise time

1

tPROG

Programming voltage high time

VPROG = 21 V

20

100

ms

tFALL

Programming voltage fall time

1

ms

VPROG

Programming voltage

Applied to GPIO pin

20

22

V

IPROG

EEPROM programming current

Current into GPIO pin

3

mA

IO PORT (GPIO) AND SERIAL INTERFACE (HDQ)

VIH

High-level input voltage

1.9

VIL

Low-level input voltage

0.7

V

VOL

GPIO low-level output voltage

IOL = 0.3 mA

0.4

V

VOL

HDQ low-level output voltage

IOL = 2 mA

0.4

IHDQPD

HDQ internal pull-down current

3

µA

STANDARD SERIAL COMMUNICATION (HDQ) TIMING(2)

t(B)

Break timing

190

t(BR)

Break recovery time

40

t(CYCH)

Host bit window timing

190

t(HW1)

Host sends 1 time

17

50

t(HW0)

Host sends 0 time

100

145

µs

t(RSPS)

bq26500 to host response time

190

320

µs

t(CYCD)

bq26500 bit window timing

190

260

t(DW1)

bq26500 sends 1 time

32

50

t(DW0)

bq26500 sends 0 time

80

145

(1) Maximum number of programming cycles on the EEPROM is 10 and data retention time is 10 years at TA=85°C

(2) See Figure 1.

(3) Not a production tested parameter.

The following timing diagrams describe break and break recovery timing (a), host transmitted bit timing (b),

bq26500 transmitted bit timing (c), and bq26500 to host response timing (d).