LMC662

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SNOSC51C – APRIL 1998 – REVISED MARCH 2013

Using the smaller capacitors will give much higher bandwidth with little degradation of transient response. It may

be necessary in any of the above cases to use a somewhat larger feedback capacitor to allow for unexpected

stray capacitance, or to tolerate additional phase shifts in the loop, or excessive capacitive load, or to decrease

the noise or bandwidth, or simply because the particular circuit implementation needs more feedback

capacitance to be sufficiently stable. For example, a printed circuit board's stray capacitance may be larger or

computed value.

CAPACITIVE LOAD TOLERANCE

Like many other op amps, the LMC662 may oscillate when its applied load appears capacitive. The threshold of

oscillation varies both with load and circuit gain. The configuration most sensitive to oscillation is a unity-gain

follower. See the Typical Performance Characteristics.

The load capacitance interacts with the op amp's output resistance to create an additional pole. If this pole

frequency is sufficiently low, it will degrade the op amp's phase margin so that the amplifier is no longer stable at

low gains. As shown in Figure 17, the addition of a small resistor (50

Ω to 100Ω) in series with the op amp's

output, and a capacitor (5 pF to 10 pF) from inverting input to output pins, returns the phase margin to a safe

value without interfering with lower-frequency circuit operation. Thus, larger values of capacitance can be

tolerated without oscillation. Note that in all cases, the output will ring heavily when the load capacitance is near

the threshold for oscillation.

Figure 17. Rx, Cx Improve Capacitive Load Tolerance

resistor conducting 500

μA or more will significantly improve capacitive load responses. The value of the pull up

resistor must be determined based on the current sinking capability of the amplifier with respect to the desired

output swing. Open loop gain of the amplifier can also be affected by the pull up resistor (see Electrical

Characteristics).

Figure 18. Compensating for Large Capacitive Loads with a Pull Up Resistor

PRINTED-CIRCUIT-BOARD LAYOUT FOR HIGH-IMPEDANCE WORK

It is generally recognized that any circuit which must operate with less than 1000 pA of leakage current requires

special layout of the PC board. When one wishes to take advantage of the ultra-low bias current of the LMC662,

typically less than 0.04 pA, it is essential to have an excellent layout. Fortunately, the techniques for obtaining

low leakages are quite simple. First, the user must not ignore the surface leakage of the PC board, even though

it may sometimes appear acceptably low, because under conditions of high humidity or dust or contamination,

the surface leakage will be appreciable.

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