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INA219AIDR Datasheet(PDF) 10 Page - Texas Instruments |
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INA219AIDR Datasheet(HTML) 10 Page - Texas Instruments |
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10 / 40 page  INA219 SBOS448F – AUGUST 2008 – REVISED SEPTEMBER 2011 www.ti.com Serial Bus Address WRITING TO/READING FROM THE INA219 To communicate with the INA219, the master must Accessing a particular register on the INA219 is first address slave devices via a slave address byte. accomplished by writing the appropriate value to the The slave address byte consists of seven address register pointer. Refer to Table 4 for a complete list of bits, and a direction bit indicating the intent of registers and corresponding addresses. The value for executing a read or write operation. the register pointer as shown in Figure 17 is the first byte transferred after the slave address byte with the The INA219 has two address pins, A0 and A1. R/W bit LOW. Every write operation to the INA219 Table 2 describes the pin logic levels for each of the requires a value for the register pointer. 16 possible addresses. The state of pins A0 and A1 is sampled on every bus communication and should Writing to a register begins with the first byte be set before any activity on the interface occurs. The transmitted by the master. This byte is the slave address pins are read at the start of each address, with the R/W bit LOW. The INA219 then communication event. acknowledges receipt of a valid address. The next byte transmitted by the master is the address of the Table 2. INA219 Address Pins and register to which data will be written. This register Slave Addresses address value updates the register pointer to the desired register. The next two bytes are written to the A1 A0 SLAVE ADDRESS register addressed by the register pointer. The GND GND 1000000 INA219 acknowledges receipt of each data byte. The GND VS+ 1000001 master may terminate data transfer by generating a GND SDA 1000010 START or STOP condition. GND SCL 1000011 When reading from the INA219, the last value stored VS+ GND 1000100 in the register pointer by a write operation determines VS+ VS+ 1000101 which register is read during a read operation. To change the register pointer for a read operation, a VS+ SDA 1000110 new value must be written to the register pointer. This VS+ SCL 1000111 write is accomplished by issuing a slave address byte SDA GND 1001000 with the R/W bit LOW, followed by the register pointer SDA VS+ 1001001 byte. No additional data are required. The master SDA SDA 1001010 then generates a START condition and sends the slave address byte with the R/W bit HIGH to initiate SDA SCL 1001011 the read command. The next byte is transmitted by SCL GND 1001100 the slave and is the most significant byte of the SCL VS+ 1001101 register indicated by the register pointer. This byte is SCL SDA 1001110 followed by an Acknowledge from the master; then SCL SCL 1001111 the slave transmits the least significant byte. The master acknowledges receipt of the data byte. The master may terminate data transfer by generating a Serial Interface Not-Acknowledge after receiving any data byte, or The INA219 operates only as a slave device on the generating a START or STOP condition. If repeated I2C bus and SMBus. Connections to the bus are reads from the same register are desired, it is not made via the open-drain I/O lines SDA and SCL. The necessary to continually send the register pointer SDA and SCL pins feature integrated spike bytes; the INA219 retains the register pointer value suppression filters and Schmitt triggers to minimize until it is changed by the next write operation. the effects of input spikes and bus noise. The INA219 Figure 14 and Figure 15 show read and write supports the transmission protocol for fast (1kHz to operation timing diagrams, respectively. Note that 400kHz) and high-speed (1kHz to 3.4MHz) modes. register bytes are sent most-significant byte first, All data bytes are transmitted most significant byte followed by the least significant byte. Figure 16 first. shows the timing diagram for the SMBus Alert response operation. Figure 17 illustrates a typical register pointer configuration. 10 Submit Documentation Feedback Copyright © 2008–2011, Texas Instruments Incorporated Product Folder Link(s): INA219 |
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