ADUC836BS datasheet(11/80 Pages) AD

Part #	ADUC836BS

Description	MicroConverter, Dual 16-Bit

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Manufacturer	AD [Analog Devices]

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ADuC836

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ADuC836

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PIN FUNCTION DESCRIPTIONS (continued)

Pin No. Pin No.

52-Lead 56-Lead

MQFP CSP

Mnemonic

Type* Description

P1.4/AIN1

I

Primary ADC, Positive Analog Input

P1.5/AIN2

I

Primary ADC, Negative Analog Input

P1.6/AIN3

I

Auxiliary ADC Input or Muxed Primary ADC, Positive Analog Input

P1.7/AIN4/DAC

I/O

Auxiliary ADC Input or Muxed Primary ADC, Negative Analog Input.The voltage

output from the DAC can also be configured to appear at this pin.

5

4, 5

AVDD

S

Analog Supply Voltage, 3 V or 5 V

6

6, 7, 8

AGND

S

Analog Ground. Ground reference pin for the analog circuitry.

7

9

REFIN(–)

I

Reference Input, Negative Terminal

8

10

REFIN(+)

I

Reference Input, Positive Terminal

13

15

SS

I

Slave Select Input for the SPI Interface. A weak pull-up is present on this pin.

14

16

MISO

I/O

Master Input/Slave Output for the SPI Interface. A weak pull-up is present on this input pin.

15

17

RESET

I

Reset Input. A high level on this pin for 16 core clock cycles while the oscillator is

running resets the device.There is an internal weak pull-down and a Schmitt trigger

input stage on this pin.

16–19,

18–21,

P3.0–P3.7

I/O

P3.0–P3.7 are bidirectional port pins with internal pull-up resistors. Port 3 pins that

22–25

24–27

have 1s written to them are pulled high by the internal pull-up resistors, and in that

state can be used as inputs. As inputs, Port 3 pins being pulled externally low will

source current because of the internal pull-up resistors.When driving a 0-to-1 output

transition, a strong pull-up is active for two core clock periods of the instruction

cycle. Port 3 pins also have various secondary functions including:

P3.0/RXD

I/O

Receiver Data for UART Serial Port

P3.1/TXD

I/O

Transmitter Data for UART Serial Port

P3.2/INT0

I/O

External Interrupt 0.This pin can also be used as a gate control input to Timer 0.

P3.3/INT1

I/O

External Interrupt 1.This pin can also be used as a gate control input to Timer 1.

P3.4/T0/PWMCLK I/O

Timer/Counter 0 External Input. If the PWM is enabled, an external clock may be

input at this pin.

P3.5/T1

I/O

Timer/Counter 1 External Input

P3.6/WR

I/O

External Data Memory Write Strobe. Latches the data byte from Port 0 into an

external data memory.

P3.7/RD

I/O

External Data Memory Read Strobe. Enables the data from an external data memory

to Port 0.

20, 34, 48 22, 36, 51, DVDD

S

Digital Supply, 3 V or 5 V

21, 35, 47 23, 37, 38, DGND

S

Digital Ground. Ground reference point for the digital circuitry.

50

26

SCLOCK

I/O

Serial Interface Clock for either the I2C or SPI Interface. As an input, this pin is a

Schmitt-triggered input, and a weak internal pull-up is present on this pin unless it is

outputting logic low.This pin can also be directly controlled in software as a digital

output pin.

27

MOSI/SDATA

I/O

Serial Data I/O for the I2C Interface or Master Output/Slave Input for the

SPI Interface. A weak internal pull-up is present on this pin unless it is outputting

logic low.This pin can also be directly controlled in software as a digital output pin.

28–31

30–33

P2.0–P2.7

I/O

Port 2 is a bidirectional port with internal pull-up resistors. Port 2 pins that have 1s

36–39

39–42

(A8–A15)

written to them are pulled high by the internal pull-up resistors, and in that state can

(A16–A23)

be used as inputs. As inputs, Port 2 pins being pulled externally low will source current

because of the internal pull-up resistors.

Port 2 emits the high order address bytes during fetches from external program memory

and middle and high order address bytes during accesses to the 24-bit external data

memory space.

32

34

XTAL1

I

Input to the Crystal Oscillator Inverter

33

35

XTAL2

O

Output from the Crystal Oscillator Inverter. (See the Hardware Design Considerations

section for description.)

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