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NC7SZ74L8X Datasheet(PDF) 4 Page - Fairchild Semiconductor

Part # NC7SZ74L8X
Description  TinyLogic UHS D-Type Flip-Flop with Preset and Clear
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Manufacturer  FAIRCHILD [Fairchild Semiconductor]
Direct Link  http://www.fairchildsemi.com
Logo FAIRCHILD - Fairchild Semiconductor

NC7SZ74L8X Datasheet(HTML) 4 Page - Fairchild Semiconductor

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4
AC Electrical Characteristics
Capacitance (Note 3)
Note 3: TA = +25C, f = 1MHz.
Note 4: CPD is defined as the value of the internal equivalent capacitance which is derived from dynamic operating current consumption (ICCD) at no output
loading and operating at 50% duty cycle. (See Figure 2) CPD is related to ICCD dynamic operating current by the expression:
ICCD = (CPD) (VCC) (fIN) + (ICCstatic).
Symbol
Parameter
VCC
(V)
TA = +25°CTA = −40°C to +85°C
Units
Conditions
Figure
Number
Min
Typ
Max
Min
Max
fMAX
Maximum Clock
1.8
± 0.15
75
75
MHz
Figures
1, 5
Frequency
2.5
± 0.2
150
150
CL = 15 pF
3.3
± 0.3
200
200
RD = 1 MΩ
5.0
± 0.5
250
250
S1 = Open
3.3
± 0.3
175
175
CL = 50 pF
5.0
± 0.5
200
200
RD = 500Ω, S1 = Open
tPLH
Propagation Delay
1.8
± 0.15
2.5
6.5
12.5
2.5
13.0
Figures
1, 3
tPHL
CK to Q, Q
2.5
± 0.2
1.5
3.8
7.5
1.5
8.0
CL = 15 pF
3.3
± 0.3
1.0
2.8
6.5
1.0
7.0
ns
RD = 1 MΩ
5.0
± 0.5
0.8
2.2
4.5
0.8
5.0
S1 = Open
3.3
± 0.3
1.0
3.4
7.0
1.0
7.5
CL = 50 pF
5.0
± 0.5
1.0
2.6
5.0
1.0
5.5
RD = 500 Ω, S1 = Open
tPLH
Propagation Delay
1.8
± 0.15
2.5
6.5
14.0
2.5
14.5
ns
Figures
1, 3
tPHL
CLR, PR, to Q, Q
2.5
± 0.2
1.5
3.8
9.0
1.5
9.5
CL = 15 pF
3.3
± 0.3
1.0
2.8
6.5
1.0
7.0
RD = 1 MΩ
5.0
± 0.5
0.8
2.2
5.0
0.8
5.5
S1 = Open
3.3
± 0.3
1.0
3.4
7.0
1.0
7.5
CL = 50 pF
5.0
± 0.5
1.0
2.6
5.0
1.0
5.5
RD = 500 Ω, S1 = Open
tS
Setup Time,
1.8
± 0.15
6.5
6.5
ns
Figures
1, 4
CK to D
2.5
± 0.2
3.5
3.5
CL = 15 pF
3.3
± 0.3
2.0
2.0
RD = 1 MΩ
5.0
± 0.5
1.5
1.5
S1 = Open
3.3
± 0.3
2.0
2.0
CL = 50 pF
5.0
± 0.5
1.5
1.5
RD = 500 Ω, S1 = Open
tH
Hold Time,
1.8
± 0.15
0.5
0.5
ns
Figures
1, 4
CK to D
2.5
± 0.2
0.5
0.5
CL = 15 pF
3.3
± 0.3
0.5
0.5
RD = 1 MΩ
5.0
± 0.5
0.5
0.5
S1 = Open
3.3
± 0.3
0.5
0.5
CL = 50 pF
5.0
± 0.5
0.5
0.5
RD = 500 Ω, S1 = Open
tW
Pulse Width,
1.8
± 0.15
6.0
6.0
ns
Figures
1, 5
CK, PR, CLR
2.5
± 0.2
4.0
4.0
CL = 15 pF
3.3
± 0.3
3.0
3.0
RD = 1 MΩ
5.0
± 0.5
2.0
2.0
S1 = Open
3.3
± 0.3
3.0
3.0
CL
= 50 pF
5.0
± 0.5
2.0
2.0
RD = 500 Ω, S1 = Open
tREC
Recover Time
1.8
± 0.15
8.0
8.0
ns
Figures
1, 4
CLR, PR to CK
2.5
± 0.2
4.5
4.5
CL = 15 pF
3.3
± 0.3
3.0
3.0
RD = 1 MΩ
5.0
± 0.5
3.0
3.0
S1 = Open
3.3
± 0.3
3.0
3.0
CL = 50 pF
5.0
± 0.5
3.0
3.0
RD = 500 Ω, S1 = Open
Symbol
Parameter
Typ
Max
Units
Conditions
CIN
Input Capacitance
3
pF
VCC = 0V
COUT
Output Capacitance
4
pF
VCC = 0V
CPD
Power Dissipation Capacitance (Note 4)
10
pF
VCC = 3.3V
12
VCC = 5.0V


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