Electronic Components Datasheet Search |
|
S1C33E07 Datasheet(PDF) 1 Page - Epson Company |
|
S1C33E07 Datasheet(HTML) 1 Page - Epson Company |
1 / 6 page S1C33E07 CMOS 32-bit Application Specific Controller ● 32-bit RISC CPU-Core Optimized for SoC (EPSON S1C33 PE) ● Built-in 8KB RAM ● SDRAM Controller with Burst Control ● Generic DMA Controller (HSDMA/IDMA) ● 6-ch. PWM Control Timer/Counter ● Supports Several Interfaces SIO with FIFO (IrDA1.0), SPI, I2S and DCSIO ● 5-ch. ADC for Analog Input ● Built-in LCD Controller with 12KB IVRAM DESCRIPTIONS The S1C33E07 is a high cost performance 32-bit RISC controller for specific applications that require a lot of general-purpose I/O, a powerful PWM Timer/Counter function, several serial interfaces including USB-FS device controller, an ADC and a LCD display system, such as middle-low range electronic dictionaries and label writers/printers. The S1C33E07 consists of a 32-bit RISC CPU-Core, generic DMA controller, USB-FS device controller, PWM control Timer/Counter, several interfaces (SIO including IrDA1.0, SPI, I2S and DCSIO), ADC, RAM/Shared IVRAM and RTC implemented by EPSON SoC design technology using 0.18 μm Mixed Analog Low CMOS Process. FEATURES ● Technology ・ 0.18 μm AL-4-Layers mixed analog low power CMOS process technology ● CPU ・ EPSON original C33 PE 32-bit RISC CPU-Core with AMBA bus optimized for SoC ・ Max. 60 MHz operation ・ Internal 2-stage pipeline and 4 instruction queues ・ Instruction set: 128 instructions (16-bit fixed length) ・ Basic instructions are compatible with the S1C33 32-bit RISC Cores. ・ Dual AMBA bus system for CPU and LCDC ● Internal Memories ・ 8KB RAM ・ 12KB IVRAM (used as general-purpose RAM or VRAM) ・ 2KB DST RAM (used as general-purpose RAM or IDMA descriptor table RAM) ● Oscillator Circuit / PLL OSC3 Oscillator Circuit ・ Crystal oscillation: 5 MHz min. to 48 MHz max. ・ Ceramic oscillation: 5 MHz min. to 48 MHz max. ・ External clock input: 5 MHz min. to 48 MHz max. PLL ・ PLL input frequency: 5 MHz min. to 50 MHz max. ・ PLL output frequency: 25 MHz min. to 90 MHz max. ・ Multiplication rate: ⋅1 ~ ⋅15. OSC1 Oscillator Circuit ・ Crystal oscillation/External clock input: 32.768 kHz typ. ● High Speed Bus (HB) Modules SRAMC (SRAM Controller) ・ 25-bit address lines and 8/16-bit selectable data bus ・ UP to a 512M-byte (A[24:0]) address space is provided for each chip enable signal. ・ Max. 8 chip enable signals are available to connect external devices. ・ Programmable bus wait cycle (0 to 7 cycles) ・ Supports external wait signals. |
Similar Part No. - S1C33E07 |
|
Similar Description - S1C33E07 |
|
|
Link URL |
Privacy Policy |
ALLDATASHEET.NET |
Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |