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NB7L72MMNTXG Datasheet(PDF) 5 Page - ON Semiconductor |
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NB7L72MMNTXG Datasheet(HTML) 5 Page - ON Semiconductor |
5 / 8 page NB7L72M http://onsemi.com 5 Table 6. AC CHARACTERISTICS VCC = 2.375 V to 3.6 V; GND = 0 V; TA = −40°C to 85°C (Note 11) Symbol Characteristic Min Typ Max Unit fMAX Maximum Input Clock Frequency VOUT w 250 mV VOUT w 200 mV 7.0 8.5 GHz fDATAMAX Maximum Operating Data Rate (PRBS23) 10 Gbps VOUTPP Output Voltage Amplitude (@ VINPPmin) fin ≤ 8.5 GHz (See Figures 3 and 10, Note 12) 200 400 mV tPLH, tPHL Propagation Delay to Differential Outputs, @ 1GHz, Measured at Differential Cross−point INn/INn to Qn/Qn SELn to Qn/Qn 110 150 180 ps tPLH TC Propagation Delay Temperature Coefficient 50 Dfs/°C tSKEW Output−to−Output Skew (within device) (Note 13) Device−to−Device Skew (tpdmax – tpdmin) 10 20 ps tDC Output Clock Duty Cycle (Reference Duty Cycle = 50%) fin v 8.5GHz 45 50 55 % tjitter RJ – Output Random Jitter (Note 14) fin v 8.5 GHz DJ – Deterministic Jitter (Note 15) v 10 Gbps 0.2 0.5 10 ps RMS ps pk−pk VINPP Input Voltage Swing (Differential Configuration) (Note 16) 100 1200 mV tr,, tf Output Rise/Fall Times @ 1 GHz (20% − 80%), Q, Q 25 30 50 ps NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 11. Measured using a 400 mV source, 50% duty cycle clock source. All output loading with external 50 W to VCC. Input edge rates w40 ps (20% − 80%). 12.Output voltage swing is a single−ended measurement operating in differential mode. 13.Skew is measured between outputs under identical transitions and conditions. Duty cycle skew is defined only for differential operation when the delays are measured from cross−point of the inputs to the cross−point of the outputs. 14.Additive RMS jitter with 50% duty cycle clock signal. 15.Additive Peak−to−Peak data dependent jitter with input NRZ data at PRBS23. 16.Input voltage swing is a single−ended measurement operating in differential mode. Figure 3. CLOCK Output Voltage Amplitude (VOUTPP) vs. Input Frequency (fin) at Ambient Temperature (Typ) fin, Clock Input Frequency (GHz) 500 450 400 350 300 200 0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 Q AMP (mV) Figure 4. Input Structure 50 W 50 W VTn VCC INn INn 250 |
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