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AP7332-1233W6-7 Datasheet(PDF) 5 Page - Diodes Incorporated |
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AP7332-1233W6-7 Datasheet(HTML) 5 Page - Diodes Incorporated |
5 / 18 page AP7332 DUAL 300mA LOW QUIESCENT CURRENT FAST TRANSIENT LOW DROPOUT LINEAR REGULATOR AP7332 Document number: DS35132 Rev. 3 - 2 5 of 18 www.diodes.com August 2011 © Diodes Incorporated Electrical Characteristics (TA = 25 oC, V IN = VOUT +1V, CIN = 1uF, COUT = 1uF, VEN = VIN , unless otherwise stated) Symbol Parameter Test Conditions Min Typ. Max Unit VREF ADJ Reference Voltage (Adjustable version) IOUT= 0mA 0.8 V IADJ ADJ Leakage (Adjustable version) 0.1 1 μA VOUT Output Voltage Accuracy TA = -40 oC to 85oC, IOUT = 10% of IOUT-Max -2 2 % ΔV OUT /ΔVIN/V Line Regulation VIN = (VOUT +1V) to VIN-Max, VEN = VIN, IOUT = 1mA 0.01 0.20 %/V ΔV OUT /VOUT Load Regulation VIN = (VOUT +1V) to VIN-Max, IOUT = 1mA to 300mA -0.6 0.6 % VDropout Dropout Voltage (Note 4) VOUT < 2.5V, IOUT = 300mA 350 600 mV VOUT ≥ 2.5V, IOUT = 300mA 250 400 IQ Input Quiescent Current (2 channels) VEN = VIN, IOUT = 0mA 60 80 μA ISHDN Input Shutdown Current VEN = 0V, IOUT = 0mA 0.1 1 μA ILEAK Input Leakage Current VEN = 0V, OUT grounded 0.1 1 μA tST Start-up Time VEN = 0V to 2.0V in 1μs, IOUT = 300mA 150 μs PSRR PSRR (Note 5) VIN = [VOUT +1V]VDC + 0.5VppAC, f = 1kHz, IOUT = 50mA 60 65 dB ISHORT Short-circuit Current VIN = VIN-Min to VIN-Max, VOUT = 1/4 target VOUT 120 mA ILIMIT Current limit VIN = VIN-Min to VIN-Max, VOUT/ROUT = 1A 400 600 mA VIL EN Input Logic Low Voltage VIN = VIN-Min to VIN-Max 0.4 V VIH EN Input Logic High Voltage VIN = VIN-Min to VIN-Max 1.4 V IEN EN Input Current VIN = 0V or VIN-Max -1 1 μA TSHDN Thermal shutdown threshold 165 °C THYS Thermal shutdown hysteresis 30 °C θJA Thermal Resistance Junction-to-Ambient SOT26 (Note 6) 140 oC/W DFN2018-6 (Note 7) 60 Notes: 4. Dropout voltage is the voltage difference between the input and the output at which the output voltage drops 2% below its nominal value. 5. This specification is guaranteed by design. 6. Test condition for SOT26: Device mounted on FR-4 substrate PC board, with minimum recommended pad layout 7. Test condition for DFN2018-6: Device mounted on FR-4 2-layer board,2oz copper, with minimum recommended pad on top layer and 3 vias to bottom layer. |
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