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NDP608A Datasheet(PDF) 1 Page - Fairchild Semiconductor |
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NDP608A Datasheet(HTML) 1 Page - Fairchild Semiconductor |
1 / 6 page May 1994 NDP608A / NDP608AE / NDP608B / NDP608BE NDB608A / NDB608AE / NDB608B / NDB608BE N-Channel Enhancement Mode Field Effect Transistor General Description Features _____________________________________________________________________ Absolute Maximum Ratings T C = 25°C unless otherwise noted Symbol Parameter NDP608A NDP608AE NDB608A NDB608AE NDP608B NDP608BE NDB608B NDB608BE Units V DSS Drain-Source Voltage 80 V V DGR Drain-Gate Voltage (R GS < 1 MΩ) 80 V V GSS Gate-Source Voltage - Continuous ±20 V - Nonrepetitive (t P < 50 µs) ±40 V I D Drain Current - Continuous 36 32 A - Pulsed 144 128 A P D Total Power Dissipation @ T C = 25°C 100 W Derate above 25°C 0.67 W/°C T J,TSTG Operating and Storage Temperature Range -65 to 175 °C T L Maximum lead temperature for soldering purposes, 1/8" from case for 5 seconds 275 °C NDP608.SAM These N-channel enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulses in the avalanche and commutation modes. These devices are particularly suited for low voltage applications such as automotive, DC/DC converters, PWM motor controls, and other battery powered circuits where fast switching, low in-line power loss, and resistance to transients are needed. 36 and 32A, 80V. R DS(ON) = 0.042and 0.045Ω. Critical DC electrical parameters specified at elevated temperature. Rugged internal source-drain diode can eliminate the need for an external Zener diode transient suppressor. 175°C maximum junction temperature rating. High density cell design (3 million/in²) for extremely low R DS(ON). TO-220 and TO-263 (D 2PAK) package for both through hole and surface mount applications. D G S © 1997 Fairchild Semiconductor Corporation |
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