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RMLV0416EGBG-5S2 Datasheet(PDF) 6 Page - Renesas Technology Corp |
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RMLV0416EGBG-5S2 Datasheet(HTML) 6 Page - Renesas Technology Corp |
6 / 15 page RMLV0416E Series R10DS0205EJ0100 Rev.1.00 Page 6 of 13 2014.2.27 Write Cycle Parameter Symbol Min. Max. Unit Note Write cycle time tWC 45 ─ ns Address valid to write end tAW 35 ─ ns Chip select to write end tCW 35 ─ ns Write pulse width tWP 35 ─ ns 10 LB#,UB# valid to write end tBW 35 ─ ns Address setup time to write start tAS 0 ─ ns Write recovery time from write end tWR 0 ─ ns Data to write time overlap tDW 25 ─ ns Data hold from write end tDH 0 ─ ns Output enable from write end tOW 5 ─ ns 11 Output disable to output in high-Z tOHZ 0 18 ns 11,12 Write to output in high-Z tWHZ 0 18 ns 11,12 Note 10. tWP is the interval between write start and write end. A write starts when all of (CS1#), (CS2), (WE#) and (one or both of LB# and UB#) become active. A write is performed during the overlap of a low CS1#, a high CS2, a low WE# and a low LB# or a low UB#. A write ends when any of (CS1#), (CS2), (WE#) or (one or both of LB# and UB#) becomes inactive. 11. This parameter is sampled and not 100% tested. 12. tOHZ and tWHZ are defined as the time when the I/O pins enter a high-impedance state and are not referred to the I/O levels. |
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