NM25C160LMT8 datasheet(4/10 Pages) FAIRCHILD

Part #	NM25C160LMT8

Description	16K-Bit Serial CMOS EEPROM (Serial Peripheral Interface (SPI) Synchronous Bus)

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Manufacturer	FAIRCHILD [Fairchild Semiconductor]

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NM25C160 Rev. D.1

Low Voltage 2.7V

≤ V

CC ≤ 4.5V Specifications

Absolute Maximum Ratings (Note 5)

Ambient Storage Temperature

-65

°C to +150°C

All Input or Output Voltage with

Respect to Ground

+6.5V to -0.3V

Lead Temp. (Soldering, 10 sec.)

+300

°C

ESD Rating

2000V

Operating Conditions

Ambient Operating Temperature

NM25C160L/LZ

0

°C to +70°C

NM25C160LZ/LZE

-40

°C to +85°C

NM25C160LV

-40

°C to +125°C

Power Supply (VCC)

2.7V–4.5V

DC and AC Electrical Characteristics 2.7V

≤ V

CC ≤ 4.5V (unless otherwise specified)

25C160L/LE

25C160LV

25C160LZ/LZE

Symbol

Parameter

Part

Conditions

Min.

Max.

Min

Max

Units

ICC

Operating Current

CS = VIL

33

mA

I

CCSB

Standby Current

L

CS = V

CC

10

µA

LZ

1

N/A

µA

I

IL

Input Leakage

V

IN = 0 to VCC

-1

1

-1

1

µA

IOL

Output Leakage

VOUT = GND to VCC

-1

1

-1

1

µA

V

IL

Input Low Voltage

-0.3

V

CC * 0.3

-0.3

V

CC * 0.3

V

IH

Input High Voltage

0.7 * V

CC

V

CC + 0.3

0.7 * V

CC

V

CC + 0.3

V

OL

Output Low Voltage

I

OL = 0.8 mA

0.4

V

VOH

Output High Voltage

IOH = –0.8 mA

VCC - 0.8

V

f

OP

SCK Frequency

1.0

MHz

t

RI

Input Rise Time

2.0

µs

t

FI

Input Fall Time

2.0

µs

tCLH

Clock High Time

(Note 6)

410

ns

t

CLL

Clock Low Time

(Note 6)

410

ns

t

CSH

Min. CS High Time

(Note 7)

500

ns

t

CSS

CS Setup Time

500

ns

tDIS

Data Setup Time

100

ns

t

HDS

HOLD Setup Time

240

ns

t

CSN

CS Hold Time

500

ns

t

DIN

Data Hold Time

100

ns

tHDN

HOLD Hold Time

240

ns

t

PD

Output Delay

C

L = 200 pF

500

ns

t

DH

Output Hold Time

0

ns

t

LZ

HOLD Output Low Z

240

ns

tDF

Output Disable Time

CL = 200 pF

500

ns

t

HZ

HOLD to Output Hi Z

240

ns

t

WP

Write Cycle Time

1-16 Bytes

15

ms

Capacitance T

A = 25°C, f = 2.1/1 MHz (Note 8)

Symbol

Test

Typ Max Units

COUT

Output Capacitance

3

8

pF

CIN

Input Capacitance

2

6

pF

AC Test Conditions

Output Load

I

OL = 10 µA, IOH = 10 µA

Input Pulse Levels

0.3V to 3.5V

Timing Measurement Reference Level

Input

0.4V and 1.6V

Output

0.8V and 1.6V

Note 5: Stress above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only, and functional operation of the device

at these or any other conditions above those indicated in the operational sections of the specification is not implied. Exposure to absolute maximum rating conditions for extended

periods may affect device reliability.

Note 6: The f

OP frequency specification specifies a minimum clock period of 1/fOP. Therefore, for every fOP clock cycle, tCLH + tCLL must be equal to or greater than 1/fOP. For

example, if the 2.1MHz period = 476ns and t

CLH = 190ns, tCLL must be 286ns.

Note 7: CS must be brought high for a minimum of tCSH between consecutive instruction cycles.

Note 8: This parameter is periodically sampled and not 100% tested.

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