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AD7685 Datasheet(PDF) 5 Page - Analog Devices |
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AD7685 Datasheet(HTML) 5 Page - Analog Devices |
5 / 16 page AD7694 Rev. A | Page 5 of 16 TIMING SPECIFICATIONS VDD = 4.75 V to 5.25 V; TA = −40°C to +85°C, unless otherwise stated. Table 4. Parameter Symbol Min Typ Max Unit Conversion Time: CNV Rising Edge to Data Available tCONV 3.2 μs Time Between Conversions tCYC 4 μs SCK Period tSCK 50 ns SCK Low Time tSCKL 20 ns SCK High Time tSCKH 20 ns SCK Falling Edge to Data Remains Valid tHSDO 5 ns SCK Falling Edge to Data Valid Delay tDSDO 20 ns CNV Low to SDO, D15 MSB Valid tEN 60 ns CNV High to SDO High Impedance tDIS 60 ns VDD = 2.7 V to 4.75 V; TA = −40°C to +85°C, unless otherwise stated. Table 5. Parameter Symbol Min Typ Max Unit Conversion Time: CNV Rising Edge to Data Available tCONV 4.66 μs Time Between Conversions tCYC 6.66 μs SCK Period tSCK 125 ns SCK Low Time tSCKL 50 ns SCK High Time tSCKH 50 ns SCK Falling Edge to Data Remains Valid tHSDO 5 ns SCK Falling Edge to Data Valid Delay tDSDO 50 ns CNV Low to SDO, D15 MSB Valid tEN 120 ns CNV High to SDO High Impedance tDIS 120 ns |
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