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NR30104R7M Datasheet(PDF) 7 Page - Linear Technology |
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NR30104R7M Datasheet(HTML) 7 Page - Linear Technology |
7 / 16 page 7 LTC3410 3410fb OPERATIO (Refer to Functional Diagram) Main Control Loop The LTC3410 uses a constant frequency, current mode step-down architecture. Both the main (P-channel MOSFET) and synchronous (N-channel MOSFET) switches are internal. During normal operation, the internal top power MOSFET is turned on each cycle when the oscillator sets the RS latch, and turned off when the current com- parator, ICOMP, resets the RS latch. The peak inductor current at which ICOMP resets the RS latch, is controlled by the output of error amplifier EA. The VFB pin, described in the Pin Functions section, allows EA to receive an output feedback voltage from an external resistive divider. When the load current increases, it causes a slight decrease in the feedback voltage relative to the 0.8V reference, which in turn, causes the EA amplifier’s output voltage to in- crease until the average inductor current matches the new load current. While the top MOSFET is off, the bottom MOSFET is turned on until either the inductor current starts to reverse, as indicated by the current reversal comparator IRCMP, or the beginning of the next clock cycle. Burst Mode Operation The LTC3410 is capable of Burst Mode operation in which the internal power MOSFETs operate intermittently based on load demand. When the converter is in Burst Mode operation, the peak current of the inductor is set to approximately 70mA re- gardless of the output load. Each burst event can last from a few cycles at light loads to almost continuously cycling with short sleep intervals at moderate loads. In between these burst events, the power MOSFETs and any unneeded circuitry are turned off, reducing the quiescent current to 26 µA. In this sleep state, the load current is being supplied solely from the output capacitor. As the output voltage droops, the EA amplifier’s output rises above the sleep threshold signaling the BURST comparator to trip and turn the top MOSFET on. This process repeats at a rate that is dependent on the load demand. Short-Circuit Protection When the output is shorted to ground, the frequency of the oscillator is reduced to about 310kHz, 1/7 the nominal frequency. This frequency foldback ensures that the in- ductor current has more time to decay, thereby preventing runaway. The oscillator’s frequency will progressively increase to 2.25MHz when VFB rises above 0V. Dropout Operation As the input supply voltage decreases to a value approach- ing the output voltage, the duty cycle increases toward the maximum on-time. Further reduction of the supply volt- age forces the main switch to remain on for more than one cycle until it reaches 100% duty cycle. The output voltage will then be determined by the input voltage minus the voltage drop across the P-channel MOSFET and the inductor. Another important detail to remember is that at low input supply voltages, the RDS(ON) of the P-channel switch increases (see Typical Performance Characteristics). Therefore, the user should calculate the power dissipation when the LTC3410 is used at 100% duty cycle with low input voltage (See Thermal Considerations in the Applica- tions Information section). Slope Compensation and Inductor Peak Current Slope compensation provides stability in constant fre- quency architectures by preventing subharmonic oscilla- tions at high duty cycles. It is accomplished internally by adding a compensating ramp to the inductor current signal at duty cycles in excess of 40%. Normally, this results in a reduction of maximum inductor peak current for duty cycles > 40%. However, the LTC3410 uses a patented scheme that counteracts this compensating ramp, which allows the maximum inductor peak current to remain unaffected throughout all duty cycles. |
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