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ADN2817ACPZ-RL7 Datasheet(PDF) 4 Page - Analog Devices |
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ADN2817ACPZ-RL7 Datasheet(HTML) 4 Page - Analog Devices |
4 / 40 page ADN2817/ADN2818 Data Sheet Rev. E | Page 4 of 40 SPECIFICATIONS TA = TMIN to TMAX, VCC = VMIN to VMAX, VEE = 0 V, CF = 0.47 µF, SLICEP = SLICEN = VEE, input data pattern: PRBS 223 − 1, unless otherwise noted. Table 1. Parameter Conditions Min Typ Max Unit QUANTIZER—DC CHARACTERISTICS Input Voltage Range At PIN or NIN, dc-coupled 1.8 2.8 V Peak-to-Peak Differential Input PIN − NIN 2.0 V Input Common-Mode Level DC-coupled (see Figure 40, Figure 41, and Figure 42) 2.3 2.5 2.8 V Differential Input Sensitivity 223 − 1 PRBS, ac-coupled,1 BER = 1 × 10−10 ADN2817 10 5 mV p-p ADN2818 200 mV p-p QUANTIZER—AC CHARACTERISTICS Data Rate 10 2700 Mbps S11 At 2.5 GHz −15 dB Input Resistance Differential 100 Ω Input Capacitance 0.65 pF QUANTIZER—SLICE ADJUSTMENT ADN2817 only Gain SLICEP − SLICEN = ±0.5 V 0.10 0.11 0.13 V/V Differential Control Voltage Input SLICEP − SLICEN −0.95 +0.95 V Control Voltage Range DC level @ SLICEP or SLICEN VEE 0.95 V Slice Threshold Offset ±1 mV LOSS OF SIGNAL DETECT (LOS) ADN2817 only Loss of Signal Detect Range (See Figure 6) RThresh = 0 Ω 14.2 20.0 mV RThresh = 100 kΩ 2.1 5.0 mV Hysteresis (Electrical) OC-48 RThresh = 0 Ω 6.2 8.2 dB RThresh = 100 kΩ 4.7 7.7 dB OC-1 RThresh = 0 Ω 4.9 7.5 dB RThresh = 10 kΩ 3.0 7.3 dB LOS Assert Time DC-coupled2 450 ns LOS Deassert Time DC-coupled2 500 ns LOSS OF LOCK DETECT (LOL) VCO Frequency Error for LOL Assert With respect to nominal 1000 ppm VCO Frequency Error for LOL Deassert With respect to nominal 250 ppm LOL Response Time OC-48 1.0 µs OC-12 1.0 µs 10 Mbps 500 µs ACQUISITION TIME Lock to Data Mode OC-48 1.3 ms OC-12 2.0 ms OC-3 3.4 ms OC-1 9.8 ms 10 Mbps 40.0 ms Optional Lock to REFCLK Mode 10.0 ms DATA RATE READBACK ACCURACY Coarse Readback See Table 19 10 % Fine Readback In addition to REFCLK accuracy 100 ppm |
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