Electronic Components Datasheet Search |
|
TLV7162828PDPQR Datasheet(PDF) 4 Page - Texas Instruments |
|
|
TLV7162828PDPQR Datasheet(HTML) 4 Page - Texas Instruments |
4 / 19 page EN1 IN EN2 6 5 4 OUT1 OUT2 GND 1 2 3 TLV716 TLV716P SBVS217A – JUNE 2013 – REVISED SEPTEMBER 2013 www.ti.com PIN CONFIGURATION DPQ PACKAGE 1,2-mm × 1,2-mm SON-6 (TOP VIEW) PIN DESCRIPTIONS NAME PIN NO. DESCRIPTION Regulated output voltage pin. OUT1 1 See the Input and Output Capacitor Requirements section in the Application Information for more details. Regulated output voltage pin. OUT2 2 See the Input and Output Capacitor Requirements section in the Application Information for more details. GND 3 Ground pin. Enable pin for regulator 2. Driving EN2 over 0.9 V turns on regulator 2. EN2 4 Driving EN2 below 0.4 V places regulator 2 into shutdown mode. Input pin. IN 5 See the Input and Output Capacitor Requirements section in the Application Information for more details. Enable pin for regulator 1. Driving EN1 over 0.9 V turns on regulator 1. EN1 6 Driving EN1 below 0.4 V places regulator 1 into shutdown mode. — PAD Connecting the thermal pad to the ground plane improves the thermal performance. 4 Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated |
Similar Part No. - TLV7162828PDPQR |
|
Similar Description - TLV7162828PDPQR |
|
|
Link URL |
Privacy Policy |
ALLDATASHEET.NET |
Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |