Electronic Components Datasheet Search |
|
AFE8406IZDQ Datasheet(PDF) 9 Page - Texas Instruments |
|
AFE8406IZDQ Datasheet(HTML) 9 Page - Texas Instruments |
9 / 151 page AFE8406 14-BIT, 85 MSPS DUAL ADC, 8-CHANNEL WIDEBAND RECEIVER www.ti.com SLWS168C – MAY 2005 – REVISED OCTOBER 2008 TA = –40°C to 85°C (unless otherwise noted) PARAMETER MIN TYP MAX UNIT Control hold during writes. tCHD 3 pin mode: a[5:0] and d[15:0] valid after wr_n and ce_n rise 6 ns 2 pin mode: a[5:0], d[15:0] and wr_n valid after ce_n rise (2) tCSPW Control strobe (ce_n and wr_n low) pulse duration during write. (2) 25 ns tCDLY Control output delay ce_n and rd_n low and a[5:0] stable to d[15:0] during read. (2) 25 ns tREC Control recovery time between reads or writes. (2) 6 ns tHIZ Control end of read to Hi-Z. rd_n and ce_n rise to d[15:0] 3-state (4) 10 ns tCOH Control read d[15:0] output hold time 1 ns (4) Specified by design and process, and not directly tested. Submit Documentation Feedback SPECIFICATIONS 9 |
Similar Part No. - AFE8406IZDQ |
|
Similar Description - AFE8406IZDQ |
|
|
Link URL |
Privacy Policy |
ALLDATASHEET.NET |
Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |