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CT1210K20G Datasheet(PDF) 6 Page - EPCOS |
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CT1210K20G Datasheet(HTML) 6 Page - EPCOS |
6 / 14 page Ceramic transient voltage suppressors B72530E0200K062 SMD multilayer varistor, E series CT1210K20G PPD ML PD 2012-11-20 Please read Cautions and warnings and Page 6 of 14 Important notes at the end of this document. Recommended soldering profiles Reflow soldering Recommended temperature characteristic for reflow soldering following JEDEC J-STD-020D Profile feature Sn-Pb eutectic assembly Pb-free assembly Preheat and soak - Temperature min - Temperature max - Time Tsmin Tsmax tsmin to tsmax 100 °C 150 °C 60 … 120 s 150 °C 200 °C 60 … 180 s Average ramp-up rate Tsmax to Tp 3 °C/s max. 3 °C/s max. Liquidous temperature Time at liquidous TL tL 183 °C 60 … 150 s 217 °C 60 … 150 s Peak package body temperature Tp 1) 220 °C … 235 °C 2) 245 °C … 260 °C 2) Time (tp) 3) within 5 °C of specified classification temperature (Tc) 20 s 3) 30 s 3) Average ramp-down rate Tp to Tsmax 6 °C/s max. 6 °C/s max. Time 25 °C to peak temperature maximum 6 min maximum 8 min 1) Tolerance for peak profile temperature (Tp) is defined as a supplier minimum and a user maximum. 2) Depending on package thickness. For details please refer to JEDEC J-STD-020D. 3) Tolerance for time at peak profile temperature (tp) is defined as a supplier minimum and a user maximum. Note: All temperatures refer to topside of the package, measured on the package body surface. Number of reflow cycles: 3 |
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