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LM5066PMHE Datasheet(PDF) 3 Page - Texas Instruments

Part # LM5066PMHE
Description  LM5066 High Voltage System Power Management and Protection IC with PMBus
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

LM5066PMHE Datasheet(HTML) 3 Page - Texas Instruments

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LM5066
www.ti.com
SNVS655G – JUNE 2011 – REVISED FEBRUARY 2013
PIN DESCRIPTIONS (continued)
Pin
Name
Description
Applications Information
No.
3
SENSE
Current sense input
The voltage across the current sense resistor (RS) is measured from VIN_K to this
pin. If the voltage across RS reaches over-current threshold the load current is limited
and the fault timer activates.
4
VIN_K
Positive supply kelvin pin
The input voltage is measured on this pin.
5
VIN
Positive supply input
This pin is the input supply connection for the device.
6
N/C
No connection
7
UVLO/EN
Under-voltage lockout
An external resistor divider from the system input voltage sets the under-voltage
turn-on threshold. An internal 20 µA current source provides hysteresis. The enable
threshold at the pin is nominally 2.48V. This pin can also be used for remote
shutdown control.
8
OVLO
Over-voltage lockout
An external resistor divider from the system input voltage sets the over-voltage turn-
off threshold. An internal 21 µA current source provides hysteresis. The disable
threshold at the pin is 2.46V.
9
AGND
Circuit ground
Analog device ground. Connect to GND at the pin.
10
GND
Circuit ground
11
SDAI
SMBus data input pin
Data input pin for SMBus. Connect to SDAO if the application does not require
unidirectional isolation devices.
12
SDAO
SMBus data output pin
Data output pin for SMBus. Connect to SDAI if the application does not require
unidirectional isolation devices.
13
SCL
SMBus clock
Clock pin for SMBus.
14
SMBA
SMBus alert line
Alert pin for SMBus, active low.
15
VREF
Internal Reference
Internally generated precision reference used for analog to digital conversion.
Connect a 1 µF capacitor on this pin to ground for bypassing.
16
DIODE
External diode
Connect this to a diode-configured MMBT3904 NPN transistor for temperature
monitoring.
17
VAUX
Auxiliary voltage input
Auxiliary pin allows voltage telemetry from an external source. Full scale input of
2.97V.
18
ADR2
SMBUS address line 2
Tri- state address line. Should be connected to GND, VDD, or left floating.
19
ADR1
SMBUS address line 1
Tri - state address line. Should be connected to GND, VDD, or left floating.
20
ADR0
SMBUS address line 0
Tri - state address line. Should be connected to GND, VDD, or left floating.
21
VDD
Internal sub-regulator output
Internally sub-regulated 4.85V bias supply. Connect a 1 µF capacitor on this pin to
ground for bypassing.
22
CL
Current limit range
Connect this pin to GND or leave floating to set the nominal over-current threshold at
50mV. Connecting CL to VDD will set the over-current threshold to be 26mV.
23
FB
Power Good feedback
An external resistor divider from the output sets the output voltage at which the PGD
pin switches. The threshold at the pin is nominally 2.46V. An internal 20 µA current
source provides hysteresis.
24
RETRY
Fault retry input
This pin configures the power up fault retry behavior. When this pin is connected to
GND or left floating, the device will continually try to engage power during a fault. If
the pin is connected to VDD, the device will latch off during a fault.
25
TIMER
Timing capacitor
An external capacitor connected to this pin sets the insertion time delay, fault timeout
period and restart timing.
26
PWR
Power limit set
An external resistor connected to this pin, in conjunction with the current sense
resistor (RS), sets the maximum power dissipation allowed in the external series
pass MOSFET.
27
N/C
No Connection
28
PGD
Power Good indicator
An open drain output. This output is high when the voltage at the FB pin is above
VFBTH (nominally 2.46V) and the input supply is within its under-voltage and over-
voltage thresholds. Connect to the output rail (external MOSFET source) or any
other voltage to be monitored.
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Copyright © 2011–2013, Texas Instruments Incorporated
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