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LM5066 Datasheet(PDF) 5 Page - Texas Instruments |
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LM5066 Datasheet(HTML) 5 Page - Texas Instruments |
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5 / 63 page  LM5066 www.ti.com SNVS655G – JUNE 2011 – REVISED FEBRUARY 2013 Electrical Characteristics Limits in standard type are for TJ = 25°C only; limits in boldface type apply over the junction temperature (TJ) range of -40°C to +125°C unless otherwise stated. Minimum and Maximum limits are ensured through test, design, or statistical correlation. Typical values represent the most likely parametric norm at TJ = 25°C, and are provided for reference purposes only. Unless otherwise stated the following conditions apply: VIN = 48V. See (1) and (2). Symbol Parameter Conditions Min Typ Max Units Input (VIN Pin) IIN-EN Input Current, enabled VUVLO = 3V and VOVLO = 2V 7.2 9.5 mA PORIT Power On Reset threshold at VIN to VIN Increasing 7.8 9.0 V trigger insertion timer POREN Power On Reset threshold at VIN to VIN Increasing 8.6 9.9 V enable all functions PORHYS POREN Hysteresis VIN Decreasing 120 mV VDD Regulator (VDD pin) VDD IVDD = 0 mA 4.60 4.90 5.15 V IVDD = 10 mA 4.85 V VDDILIM VDD Current Limit -25 -30 -42 mA VDDPOR VDD Voltage Reset threshold VDD Rising 4.1 V UVLO/EN, OVLO Pins UVLOTH UVLO threshold VUVLO Falling 2.41 2.48 2.55 V UVLOHYS UVLO hysteresis current UVLO = 1V 13 20 26 µA UVLODEL UVLO delay Delay to GATE high 9 µs Delay to GATE low 13 UVLOBIAS UVLO bias current UVLO = 3V 1 µA OVLOTH OVLO threshold VOVLO Rising 2.39 2.46 2.53 V OVLOHYS OVLO hysteresis current OVLO = 1V -26 -21 -13 µA OVLODEL OVLO delay Delay to GATE high 13 µs Delay to GATE low 10 OVLOBIAS OVLO bias current OVLO = 1V 1 µA Power Good (PGD pin) PGDVOL Output low voltage ISINK = 2 mA 60 110 mV PGDIOH Off leakage current VPGD = 80V 1 µA FB Pin FBTH FB Threshold VUVLO = 3V and VOVLO = 2V 2.41 2.46 2.52 V FBHYS FB Hysteresis Current -25 -20 -15 µA FBDEL FB Delay Delay to PGD high 7.6 µs Delay to PGD low 9.2 µs FBLEAK Off Leakage Current VFB = 2.3V 1 µA Power Limit (PWR Pin) PWRLIM Power limit sense voltage (VIN-SENSE) SENSE-OUT = 48V, RPWR = 121 kΩ 16.5 19.5 22.5 mV SENSE-OUT = 24V, RPWR = 75 kΩ 23 mV IPWR PWR pin current VPWR = 2.5V -20 µA RSAT(PWR) PWR pin impedance when disabled UVLO = 2V 135 Ω Gate Control (GATE Pin) IGATE Source current Normal Operation -26 -20 -10 µA Fault Sink current UVLO = 2V 3.4 4.2 5.3 mA POR Circuit Breaker sink current VIN - SENSE = 150 mV or VIN < PORIT, 50 115 180 mA VGATE = 5V (1) Current out of a pin is indicated as a negative value. (2) All electrical characteristics having room temperature limits are tested during production at TA = 25°C. All hot and cold limits are specified by correlating the electrical characteristics to process and temperature variations and applying statistical process control. Copyright © 2011–2013, Texas Instruments Incorporated Submit Documentation Feedback 5 Product Folder Links: LM5066 |
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