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ACPL-K44T-060E Datasheet(PDF) 6 Page - AVAGO TECHNOLOGIES LIMITED |
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ACPL-K44T-060E Datasheet(HTML) 6 Page - AVAGO TECHNOLOGIES LIMITED |
6 / 11 page 6 Switching Specifications (AC) Over recommended operating (TA = -40° C to 125° C), VCC = 5.0 V unless otherwise specified. Parameter Symbol Min Typ Max Units Test Conditions Fig. Note Propagation Delay Time to Logic Low at Output tPHL 0.07 0.15 0.8 s TA = 25° C IF = 10 mA, RL = 1.9 k Pulse: f = 10 kHz, Duty cycle = 50%, VCC = 5.0 V, CL = 15 pF, VTHHL = 1.5 V 5, 6, 7, 8, 9, 10, 13 2, 3 0.06 1.0 0.7 5 IF = 1.5 mA, RL = 10 k 110 IF = 0.8 mA, RL = 27 k Propagation Delay Time to Logic High at Output tPLH 0.15 0.5 0.8 s TA = 25° C IF = 10 mA, RL = 1.9 k Pulse: f = 10 kHz, Duty cycle = 50%, VCC = 5.0 V, CL = 15 pF, VTHHL = 2.0 V 5, 6, 7, 8, 9, 10, 13 2, 3 0.03 1.0 0.9 5 IF = 1.5 mA, RL = 10 k 210 IF = 0.8 mA, RL = 27 k Pulse Width Distortion PWD 0.35 0.45 s TA = 25° C Pulse: f = 10 kHz, Duty cycle = 50%, IF = 10 mA, VCC = 5.0 V, RL = 1.9 k , CL = 15 pF, VTHHL = 1.5 V, VTHLH = 2.0 V 2, 3, 4 0.85 Propagation Delay Difference Between Any 2 Parts PDD 0.35 0.5 s TA = 25° C Pulse: f = 10 kHz, Duty cycle = 50%, IF = 10 mA, VCC = 5.0 V, RL = 1.9 k , CL = 15 pF, VTHHL = 1.5 V, VTHLH = 2.0 V 2, 3, 5 0.9 Common Mode Transient Immunity at Logic High Output |CMH| 1530 kV/ s IF = 0 mA VCM = 1500 Vp-p, RL = 1.9 k, VCC = 5 V, TA = 25° C 14 6 Common Mode Transient Immunity at Logic Low Output |CML| 1530 kV/ s IF = 10 mA Common Mode Transient Immunity at Logic High Output |CMH|5 kV/ s IF = 0 mA VCM = 1500 Vp-p, RL = 10 k, VCC = 5 V, TA = 25° C 14 6 Common Mode Transient Immunity at Logic Low Output |CML|5 kV/ s IF = 1.5 mA Package Characteristics Parameter Symbol Min. Typ. Max. Units Test Conditions Fig. Note Input-Output Momentary Withstand Voltage* VISO 5000 VRMS RH ≤ 50%, t = 1 min., TA = 25° C 7, 8 Input-Output Resistance RI-O 1014 VI-O = 500 Vdc 7 Input-Output Capacitance CI-O 0.6 pF f = 1 MHz, VI-O = 0 Vdc 7 * The Input-Output Momentary Withstand Voltage is a dielectric voltage rating that should not be interpreted as an input-output continuous voltage rating. Notes: 1. Current Transfer Ratio in percent is defined as the ratio of output collector current, IO, to the forward LED input current, IF, times 100. 2. Use of a 0.1 F bypass capacitor connected between pins 5 and 8 is recommended. 3. The 1.9 k load represents 1 TTL unit load of 1.6 mA and the 5.6 k pull-up resistor. 4. Pulse Width Distortion (PWD) is defined as |tPHL – tPLH| for any given device. 5. The difference between tPLH and tPHL between any two parts under the same test condition. 6. Common transient immunity in a Logic High level is the maximum tolerable (positive) dVCM/dt on the rising edge of the common mode pulse, VCM, to assure that the ouput will remain in a Logic High state (i.e., VO > 2.0 V). Common mode transient immunity in a Logic Low level is the maximum tolerable (negative) dVCM/dt on the falling edge of the common mode pulse signal, VCM to assure that the output will remain in a Logic Low state (i.e., VO < 0.8 V). 7. Device considered a two terminal device: pins 1, 2, 3 and 4 shorted together, and pins 5, 6, 7 and 8 shorted together. 8. In accordance with UL 1577, each optocoupler is proof tested by applying an insulation test voltage > 6000 VRMS for 1 second. |
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