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AD7243ARZ Datasheet(PDF) 4 Page - Analog Devices |
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AD7243ARZ Datasheet(HTML) 4 Page - Analog Devices |
4 / 12 page AD7243 –4– REV. A AD7243 PIN FUNCTION DESCRIPTIONS (DIP and SOIC PIN NUMBERS) Pin Mnemonic Description 1 REFIN Voltage Reference Input. It is internally buffered before being applied to the DAC. The nominal reference voltage for specified operation of the AD7243 is 5 V. 2 REFOUT Voltage Reference Output. The internal 5 V analog reference is provided at this pin. To operate the part - using its internal reference, REFOUT should be connected to REFIN. 3 CLR Clear, Logic Input. Taking this input low sets VOUT to 0 V in both unipolar ranges and the two’s complement bipolar range and to –REFIN in the offset binary bipolar range. 4 BIN/COMP Logic Input. This input selects the data format to be either binary or two’s complement. In both unipolar ranges, natural binary format is selected by connecting this input to a Logic “0.” In the bipolar configuration, offset binary format is selected with a Logic “0” while a Logic “1” selects two’s complement format. 5 SCLK Serial Clock, Logic Input. Data is clocked into the input register on each falling SCLK edge. 6 SDIN Serial Data In, Logic Input. The 16-bit serial data word is applied to this input. 7 SYNC Data Synchronization Pulse, Logic Input. Taking this input low initializes the internal logic in readiness for a new data word. 8 DGND Digital Ground. Ground reference for all digital circuitry. 9 LDAC Load DAC, Logic Input. Updates the DAC output. The DAC output is updated on the falling edge of this signal or alternatively if this line is permanently low, an automatic update mode is selected whereby the DAC is updated on the 16th falling SCLK pulse. 10 DCEN Daisy-Chain Enable, Logic Input. Connect this pin high if a daisy-chain interface is being used, otherwise this pin must be connected low. 11 SDO Serial Data Out, Logic Output. With DCEN at Logic “1” this output is enabled, and the serial data in the input shift register is clocked out on each falling SCLK edge. 12 AGND Analog Ground. Ground reference for all analog circuitry. 13 ROFS Output Offset Resistor for the amplifier. It is connected to VOUT for the +5 V range, to AGND for the +10 V range and to REFIN for the –5 V to +5 V range. 14 VOUT Analog Output Voltage. This is the buffer amplifier output voltage. Three different output voltage ranges can be chosen: 0 V to +5 V, 0 to +10 V and –5 V to +5 V. 15 VSS Negative Power Supply (used for the output amplifier only, may be connected to 0 V for single supply operation or to –12 V to –15 V for dual supplies). 16 VDD Positive Power Supply (+12 V to +15 V). TERMINOLOGY Bipolar Zero Error Bipolar Zero Error is the voltage measured at VOUT when the DAC is configured for bipolar output and loaded with all 0s (Two’s Complement Coding) or with 1000 0000 0000 (Offset Binary Coding). It is due to a combination of offset errors in the DAC, amplifier and mismatch between the internal gain resis- tors around the amplifier. Full-Scale Error Full-Scale Error is a measure of the output error when the am- plifier output is at full scale (for the bipolar output range full scale is either positive or negative full scale). It is measured with respect to the reference input voltage and includes the offset errors. Digital-to-Analog Glitch Impulse This is the voltage spike that appears at VOUT when the digital code in the DAC latch changes, before the output settles to its final value. The energy in the glitch is specified in nV secs, and is measured for an all codes change from 0000 0000 0000 to 1111 1111 1111 and vice versa. Digital Feedthrough This is a measure of the voltage spike that appears on VOUT as a result of feedthrough from the digital inputs on the AD7243. It is measured with LDAC held high. Relative Accuracy (Linearity) Relative Accuracy, or endpoint linearity, is a measure of the maximum deviation of the DAC transfer function from a straight line passing through the endpoints of the transfer func- tion. It is measured after allowing for zero and full-scale errors and is expressed in LSBs or as a percentage of full-scale reading. Single Supply Linearity and Gain Error The output amplifier on the AD7243 can have true negative off- sets even when the part is operated from a single +15 V supply. However, because the negative supply rail (VSS) is 0 V, the out- put cannot actually go negative. Instead, when the output offset voltage is negative, the output voltage sits at 0 V, resulting in the transfer function shown in Figure 1. OUTPUT VOLTAGE NEGATIVE OFFSET DAC CODE 0V { Figure 1. Effect of Negative Offset (Single Supply) |
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