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LT3797IUKGPBF Datasheet(PDF) 9 Page - Linear Technology |
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LT3797IUKGPBF Datasheet(HTML) 9 Page - Linear Technology |
9 / 36 page LT3797 9 3797f For more information www.linear.com/LT3797 PIN FUNCTIONS TG1, TG2, TG3 (Pins 14, 33, 35): Top Gate Driver Out- put Pins for Driving LED Loads Disconnect P-Channel MOSFETs (PMOSs). One for each channel. An inverted PWM signal drives an external PMOS gate of the respec- tive converter between VISP and (VISP – 6.5V). Leave TG pins unconnected if not used. ISN1,ISN2,ISN3(Pins15,32,36):ConnectionPointsfor the Negative Terminals of the Current Feedback Resistors. ISP1, ISP2, ISP3 (Pins 16, 31, 37): Connection Points for the Positive Terminals of the Current Feedback Resis- tors. Also serves as positive rails for TG pin drivers and the reference point for FBH. FBH1, FBH2, FBH3 (Pins 17, 30, 38): Voltage Loop Feed- back Pins. The output feedback voltage VFB is measured between the ISP pin and the FBH pin (absolute value): VFB = |ISP – FBH|. The FBH pin is intended for constant- voltage regulation or for LED protection/open-LED detec- tion for each channel. In an open-LED event, the internal amplifier with output VC regulates VFB to 1.25V (typical) through the respective converter. If VFB is above the over- voltage threshold (typical 1.3V), the TG pin of the same channel is driven high to disconnect the external PMOS to protect the LEDs from an overvoltage event. Either open- LED or overvoltage event signals a fault condition. Do not leave the FBH pins open. It requires ISP to be no less than 4.5V to maintain an accurate VFB1 voltage sense. If ISP falls below 4.5V, the voltage regulation is deactivated and the ISP-ISN current regulation dominates regardless of the |ISP-FBH| value. If not used, connect the FBH pin to the ISP pin of the same channel. VC1, VC2, VC3 (Pins 19, 28, 40): Error Amplifier Com- pensation Pins. Connect a series RC from each VC pin to GND. In each channel, the VC pin is high impedance when the PWM pin is low, or the CTRL pin is below 150mV. This feature allows the VC pin to store the demand current state variable for the next PWM or CTRL high transition. SS1, SS2, SS3 (Pins 20, 27, 41): Soft-Start Pins. Each SS pin modulates compensation VC pin voltage of the respective channel. Each of the soft-start intervals is set with an external capacitor. SENSEN1, SENSEN2, SENSEN3 (Pins 21, 26, 42): The NegativeCurrentSenseInputsfortheControlLoops.Kelvin connect the SENSEN pin to the negative terminal of the switch current sense resistor (which connects to the GND plane) of the respective converter. Connect SENSEN pin to SENSEP pin of the same channel with a 0.1µF ceramic capacitor placed close to pins. SENSEP1, SENSEP2, SENSEP3 (Pins 22, 25, 43): The Positive Current Sense Inputs for the Control Loops. Kelvin connect the SENSEP pin to the positive terminal of the switch current sense resistor in the source of the externalN-channelMOSFET(NMOS)switchoftherespec- tive converter. Connect SENSEP pin to SENSEN pin of the same channel with a 0.1µF ceramic capacitor placed close to pins. GATE1, GATE2, GATE3 (Pins 23, 24, 44): N-Channel MOSFET Gate Driver Outputs. Switch between INTVCCand GND. Driven to GND during shutdown, fault or idle states. INTVCC(Pins45,46):INTVCCpinsaretheintegratedpower supplyoutputvoltagenodesthatprovidesupplyforcontrol circuits and NMOS gate drivers. The two INTVCC pins are internally shorted. Must be bypassed with a 10µF ceramic capacitor placed close to the pins. SW2 (Pin 47): Integrated Power Supply Switch Node. Connect this pin to one side of the integrated power sup- ply inductor. BOOST (Pin 48): Connect this pin to SW1 pin through a 0.1µF ceramic capacitor. SW1 (Pin 49): Integrated Power Supply Switch Node. Connect this pin to the other side of the integrated power supply inductor, and to the BOOST pin with a 0.1µF ce- ramic capacitor. VIN (Pin 50): Input Supply Pin. If VIN is over 41V (typical), the integrated INTVCC power supply is turned off. All three channels are also turned off (including pulling the GATE pins to GND and TG pins to ISP) and the soft-starts are reset. Must be locally bypassed with low ESR capacitors placed close to the pin. |
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