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AD7828LP Datasheet(PDF) 6 Page - Analog Devices |
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AD7828LP Datasheet(HTML) 6 Page - Analog Devices |
6 / 16 page AD7824/AD7828 –6– REV. F OPERATIONAL DIAGRAM The AD7824 is a 4-channel 8-bit ADC and the AD7828 is an 8-channel 8-bit ADC. Operational diagrams for both of these devices are shown in Figures 3 and 4. The addition of just a 5 V reference allows the devices to perform the analog-to-digital function. 24 23 22 21 20 19 18 17 16 15 14 13 1 2 3 4 5 6 7 8 9 10 11 12 AD7824 NC = NO CONNECT AIN4 VDD AIN3 NC AIN2 A0 AIN1 A1 NC DB7 DB0 DB6 DB1 DB5 DB2 DB4 DB3 CS RD RDY INT VREF (+) GND VREF (–) ANALOG INPUTS 0V TO 5V P 4LSB DATA BUS P CONTROL INPUT STATUS OUTPUT P ADDRESS BUS P 4MSB DATA BUS P CONTROL INPUT STATUS OUTPUT 5V 5V Figure 3. AD7824 Operational Diagram 28 27 26 25 24 23 22 21 20 19 18 17 16 15 1 2 3 4 5 6 7 8 9 10 11 12 13 14 AD7828 NC = NO CONNECT AIN6 AIN7 AIN5 AIN8 AIN4 VDD AIN3 A0 AIN2 A1 AIN1 A2 NC DB7 DB0 DB6 DB1 DB5 DB2 DB4 DB3 CS RD RDY INT VREF (+) GND VREF (–) ANALOG INPUTS 0V TO 5V P 4LSB DATA BUS P CONTROL INPUT STATUS OUTPUT ANALOG INPUTS 0V TO 5V P ADDRESS BUS P 4MSB DATA BUS P CONTROL INPUT STATUS OUTPUT 5V 5V Figure 4. AD7828 Operational Diagram CIRCUIT INFORMATION BASIC DESCRIPTION The AD7824/AD7828 uses a half-flash conversion technique whereby two 4-bit flash ADCs are used to achieve an 8-bit result. Each 4-bit flash ADC contains 15 comparators that compare the unknown input to a reference ladder to get a 4-bit result. For a full 8-bit reading to be realized, the upper 4-bit flash, the most significant (MS) flash, performs a conversion to provide the four most significant data bits. An internal DAC, driven by the four MSBs, then recreates an analog approximation of the input voltage. This analog result is subtracted from the input, and the difference is converted by the lower flash ADC, the least significant (LS) flash, to provide the four least significant bits of the output data. The most significant flash ADC also has one additional comparator to detect overrange on the analog input. APPLYING THE AD7824/AD7828 REFERENCE AND INPUT The two reference inputs on the AD7824/AD7828 are fully differ- ential and define the zero to full-scale input range of the ADC. As a result, the span of the analog input voltage for all channels can easily be varied. By reducing the reference span, VREF (+) to VREF (–), to less than 5 V, the sensitivity of the converter can be increased (e.g., if VREF = 2 V then 1 LSB = 7.8 mV). The input/ reference arrangement also facilitates ratiometric operation. This reference flexibility also allows the input channel voltage span to be offset from zero. The voltage at VREF (–) sets the input level for all channels, which produces a digital output of all zeroes. Therefore, although the analog inputs are not them- selves differential, they have nearly differential input capability in most measurement applications because of the reference design. Figures 5 to 7 show some of the configurations that are possible. AD7824* AD7828* AIN1 GND VDD VREF (+) VREF (–) 47 F 0.1 F VIN (–) VIN (+) 5V ADDITIONAL PINS OMITTED FOR CLARITY. ONLY CHANNEL 1 SHOWN. * Figure 5. Power Supply as Reference AD7824* AD7828* AIN1 GND VDD VREF (+) VREF (–) 47 F 0.1 F VIN (–) VIN (+) 5V ADDITIONAL PINS OMITTED FOR CLARITY. ONLY CHANNEL 1 SHOWN. * AD580 0.1 F 10 F Figure 6. External Reference Using the AD580, Full-Scale Input is 2.5 V AD7824* AD7828* AIN1 GND VDD VREF (+) VREF (–) 47 F 0.1 F VIN (+) 5V ADDITIONAL PINS OMITTED FOR CLARITY. ONLY CHANNEL 1 SHOWN. * DB7 DB0 DATA V1 V2 DATA = 256 (FOR ALL CHANNELS) VIN (+) V1 – V2 Figure 7. Input Not Referenced to GND |
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