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ADP3333ARM-2.5-RL Datasheet(PDF) 9 Page - Analog Devices |
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ADP3333ARM-2.5-RL Datasheet(HTML) 9 Page - Analog Devices |
9 / 12 page ADP3333 Rev. B | Page 9 of 12 THEORY OF OPERATION The ADP3333 anyCAP LDO uses a single control loop for regulation and reference functions (see Figure 22). The output voltage is sensed by a resistive voltage divider consisting of R1 and R2 that is varied to provide the available output voltage option. Feedback is taken from this network by way of a series diode (D1) and a second resistor divider (R3 and R4) to the input of an amplifier. INPUT Q1 ADP3333 COMPENSATION CAPACITOR R1 D1 R2 R3 R4 OUTPUT PTAT CURRENT (a) FB GND gm RL CL PTAT VOS ATTENUATION (VBAND GAP/VOUT) NONINVERTING WIDEBAND DRIVER Figure 22. Functional Block Diagram A very high gain error amplifier is used to control this loop. The amplifier is constructed in such a way that at equilibrium it produces a large, temperature-proportional input offset voltage that is repeatable and very well controlled. The temperature proportional offset voltage is combined with the complementary diode voltage to form a virtual band gap voltage, implicit in the network, although it never appears explicitly in the circuit. Ultimately, this patented design makes it possible to control the loop with only one amplifier. This technique also improves the noise characteristics of the amplifier by providing more flexibility on the trade-off of noise sources and leads to a low noise design. The R1, R2 divider is chosen in the same ratio as the band gap voltage to the output voltage. Although the R1/R2 resistor divider is loaded by the diode, D1, and a second divider consisting of R3 and R4, the values can be chosen to produce a temperature stable output. This unique arrangement specifically corrects for the loading of the divider so that the error resulting from base current loading in conventional circuits is avoided. The patented amplifier controls a new and unique noninverting driver that drives the pass transistor, Q1. The use of this special noninverting driver enables the frequency compensation to include the load capacitor in a pole splitting arrangement to achieve reduced sensitivity to the value, type, and ESR of the load capacitance. Most LDOs place very strict requirements on the range of ESR values for the output capacitor because they are difficult to stabilize due to the uncertainty of load capacitance and resistance. Moreover, the ESR value required to keep conventional LDOs stable changes depending on load and temperature. These ESR limitations make designing with LDOs more difficult because of their unclear specifications and extreme variations over temperature. With the ADP3333 anyCAP LDO, this is no longer true. This device can be used with virtually any good quality capacitor, with no constraint on the minimum ESR. Its innovative design allows the circuit to be stable with just a small 1.0 μF capacitor on the output. Additional advantages of the pole splitting scheme include superior line noise rejection and very high regulator gain, which leads to excellent line and load regulation. An impressive ±1.8% accuracy is guaranteed over line, load, and temperature. Additional features of the circuit include current limit and thermal shutdown. |
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