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OPA4353EA2K5G4 Datasheet(PDF) 10 Page - Texas Instruments |
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OPA4353EA2K5G4 Datasheet(HTML) 10 Page - Texas Instruments |
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10 / 26 page  10 OPA353, 2353, 4353 ® Figure 5 shows the OPA353 driving an ADS7861. The ADS7861 is a dual, 12-bit, 500kHz sampling converter in the small SSOP-24 package. When used with the miniature package options of the OPA353 series, the combination is ideal for space-limited and low power applications. For further information consult the ADS7861 data sheet. OUTPUT IMPEDANCE The low frequency open-loop output impedance of the OPA353’s common-source output stage is approximately 1k Ω. When the op amp is connected with feedback, this value is reduced significantly by the loop gain of the op amp. For example, with 122dB of open-loop gain, the output impedance is reduced in unity-gain to less than 0.001 Ω. For each decade rise in the closed-loop gain, the loop gain is reduced by the same amount which results in a ten-fold increase in output impedance (see the typical performance curve, “Output Impedance vs Frequency”). At higher frequencies, the output impedance will rise as the open-loop gain of the op amp drops. However, at these frequencies the output also becomes capacitive due to parasitic capacitance. This prevents the output impedance from becoming too high, which can cause stability prob- lems when driving capacitive loads. As mentioned previ- ously, the OPA353 has excellent capacitive load drive capability for an op amp with its bandwidth. VIDEO LINE DRIVER Figure 6 shows a circuit for a single supply, G = 2 com- posite video line driver. The synchronized outputs of a composite video line driver extend below ground. As shown, the input to the op amp should be ac-coupled and shifted positively to provide adequate signal swing to account for these negative signals in a single-supply con- figuration. The input is terminated with a 75 Ω resistor and ac-coupled with a 47 µF capacitor to a voltage divider that provides the dc bias point to the input. In Figure 6, this point is approximately (V–) + 1.7V. Setting the optimal bias point requires some understanding of the nature of composite video signals. For best performance, one should be careful to avoid the distortion caused by the transition region of the OPA353’s complementary input stage. Refer to the discussion of rail-to-rail input. FIGURE 5. OPA4353 Driving Sampling A/D Converter. 1/4 OPA4353 V IN B1 2 3 4 2k Ω 2k Ω C B1 CH B1+ CH B1– CH B0+ CH B0– CH A1+ CH A1– CH A0+ CH A0– REF IN REF OUT Serial Data A Serial Data B BUSY CLOCK CS RD CONVST A0 M0 M1 2 3 4 5 6 7 8 9 10 11 23 22 21 20 19 18 17 16 15 14 1/4 OPA4353 V IN B0 +5V 6 5 2k Ω 2k Ω C B0 1/4 OPA4353 V IN A1 9 10 8 7 2k Ω 2k Ω C A1 1/4 OPA4353 V IN A0 14 11 112 2k Ω 2k Ω C A0 0.1 µF 0.1 µF +V A +V D 24 13 Serial Interface DGND AGND ADS7861 V IN = 0V to 2.45V for 0V to 4.9V output. Choose C B1, CB0, CA1, CA0 to filter high frequency noise. |
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