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TMS320DM6467CCUTA Datasheet(PDF) 10 Page - Texas Instruments

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Part # TMS320DM6467CCUTA
Description  Digital Media System-on-Chip
Download  355 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

TMS320DM6467CCUTA Datasheet(HTML) 10 Page - Texas Instruments

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TMS320DM6467
SPRS403H – DECEMBER 2007 – REVISED JUNE 2012
www.ti.com
3.2
Device Compatibility
The ARM926EJ-S RISC CPU is compatible with other ARM9 CPUs from ARM Holdings plc.
The C64x+ DSP core is code-compatible with the C6000™ DSP platform and supports features of the
C64x DSP family.
3.3
ARM Subsystem
The ARM Subsystem is designed to give the ARM926EJ-S (ARM9) master control of the device. In
general, the ARM is responsible for configuration and control of the device; including the DSP Subsystem,
the VPSS Subsystem, and a majority of the peripherals and external memories.
The ARM Subsystem includes the following features:
ARM926EJ-S RISC processor
ARMv5TEJ (32/16-bit) instruction set
Little endian operation
Co-Processor 15 (CP15)
MMU
16KB Instruction cache
8KB Data cache
Write Buffer
32KB Internal Tightly-Coupled Memory (TCM) RAM (32-bit wide access)
8KB Internal ROM (ARM bootloader for non-EMIFA boot options)
Embedded Trace Module and Embedded Trace Buffer (ETM/ETB)
ARM Interrupt Controller
PLL Controller
Power and Sleep Controller (PSC)
System Module
3.3.1
ARM926EJ-S RISC CPU
The ARM Subsystem integrates the ARM926EJ-S processor. The ARM926EJ-S processor is a member of
ARM9 family of general-purpose microprocessors. This processor is targeted at multi-tasking applications
where full memory management, high performance, low die size, and low power are all important. The
ARM926EJ-S processor supports the 32-bit ARM and 16 bit THUMB instruction sets, enabling the user to
trade off between high performance and high code density. Specifically, the ARM926EJ-S processor
supports the ARMv5TEJ instruction set, which includes features for efficient execution of Java byte codes,
providing Java performance similar to Just in Time (JIT) Java interpreter, but without associated code
overhead.
The ARM926EJ-S processor supports the ARM debug architecture and includes logic to assist in both
hardware and software debug. The ARM926EJ-S processor has a Harvard architecture and provides a
complete high performance subsystem, including:
ARM926EJ -S integer core
CP15 system control coprocessor
Memory Management Unit (MMU)
Separate instruction and data Caches
Write buffer
Separate instruction and data Tightly-Coupled Memories (TCMs) [internal RAM] interfaces
Separate instruction and data AHB bus interfaces
Embedded Trace Module and Embedded Trace Buffer (ETM/ETB)
10
Device Overview
Copyright © 2007–2012, Texas Instruments Incorporated
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Product Folder Link(s): TMS320DM6467


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