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OPERATIONAL EXPLANATION (Continued)

<Current limiter, short-circuit protection>

When the output current reaches the current limit value, the constant current limiter circuit activates and as a result, the

output voltage goes down.

value. If the over-current state lasts for 7.5ms (TYP.), the FLG pin changes to Low level output.

Two types are available for the current limiter circuit: an auto recovery type (product type C) and a latch off type (product type

D). After the current limiter circuit activates and the FLG pin outputs low level, the operation is different between these two

types.

The auto recovery type continuously limits the output current by the current limit value.

When the over-current status finishes and the status of that the output current is less than the current limit value continues for

7.5ms (TYP.) or more, the voltage of FLG pin goes up “H” level again.

The latch off type turns off the power switch transistor after the FLG pin outputs Low level. The off state is maintained

regardless of whether the over-current state is released.

Latch operation is released by turning off the IC with the CE pin signal and then restarting, or by lowering the input voltage

below the UVLO detected voltage once and after that raising it higher than UVLO released voltage.

<Reverse current prevention>

If the reverse-voltage state lasts for 4ms (TYP.), the FLG pin changes to Low level output.

Two types are available for the reverse current prevention circuit: the auto recovery type (product type C) and the latch off

type (product type D). After the reverse current prevention circuit activates and the FLG pin outputs low level, the operation is

different between these two types.

On the auto recovery type, when the output voltage drops below the input voltage, the reverse current prevention circuit stops

immediately, and the power switch transistor turns on again. If the output voltage remains lower than the input voltage for 4ms

(TYP.), the FLG pin returns to High level output.

On the latch off type, the power switch transistor remains in the off state even if the reverse voltage state is released.

Latch operation is released by turning off the IC with the CE pin signal and then restarting, or by lowering the input voltage

below the UVLO detected voltage once and after that raising it higher than UVLO released voltage.