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OPERATIONAL EXPLANATION (Continued)

Details of each circuit block are as follows.

Reference voltage that enables stable operation of the internal functions of the IC.

<PWM comparator (PWMCMP)>

pin voltage.

<Buffer drive circuit (Buffer Drive)>

and the L level is the GND pin voltage. The signal that is output is determined by the PWM comparator, as well as by the below

voltage.

<Enable / PWM Dimming (EN/DIM)>

When the power is turned on, it takes about 200μs (MAX.) for the GATE pin to initially become “H” after the EN/DIM pin

voltage is changed from “L” to “H”.

Inputting “L” to the EN/DIM pin voltage forcibly puts the GATE pin voltage in the “L” state. The stopped state when the EN/DIM

pin voltage is “L” is not shutdown; rather, it is a Stand-by state wherein the switching pulse output is stopped by logic circuit and

the internal circuitry continues to operate. For this reason, a high-speed response is possible even when a pulse signal (500 Hz

to 1 kHz) is input to the EN/DIM pin, and by adjusting the duty width of the PWM signal input into the EN/DIM pin, the LED can

be dimmed.

< Minimum on time controller circuit >

Spike noise and ripple noise occur in the XC9401 series due to switching. To prevent malfunction of the internal circuit by such

noises, a minimum on time is established. The GATE pin voltage is forcibly kept at “H” until the minimum on time elapses. (Refer

to Fig. 2.)

During the minimum on time, if the below described UVLO, OVP or thermal shutdown is detected, or if the Stand-by state is set

from the EN/DIM pin, the GATE pin voltage is immediately changed to “L”.

<Off Time Controller>

This circuit controls the fixed off time. The off time is normally fixed at 6μs (TYP.), and the GATE pin voltage is kept at “L”

during this time. After the fixed off time, the GATE pin voltage becomes “H”. (Refer to Fig. 2.)

If the EN/DIM pin voltage is changed from “L” to “H” during the above PWM dimming, the off time is 140μs (TYP.) during the

over-current protection and ULVO release described below.

Fig.2. Off Time Controller, Min. On Time Controller