LP3906

SNVS456M – AUGUST 2006 – REVISED MAY 2013

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LOW DROP OUT REGULATORS, LDO1 AND LDO2

+125°C.

(1) (2) (3) (4) (5) (6) (7)

Parameter

Test Conditions

Min

Typ

Max

Units

Operational Voltage Range

VINLDO1 and VINLDO2 PMOS

1.74

5.5

V

Load current = 1 mA

−3

3

%

Line Regulation

0.15

%/V

Load Regulation

0.011

%/mA

Short Circuit Current Limit

500

mA

Dropout Voltage

25

200

mV

PSRR

Power Supply Ripple Rejection

45

dB

θn

Supply Output Noise

10 Hz < F < 100 KHz

80

µVrms

(6) (9)

Quiescent Current “On”

40

µA

Quiescent Current “On”

60

µA

Quiescent Current “Off”

0.03

µA

Turn On Time

Start up from shut-down

300

µs

Output Capacitor

Capacitance for stability 0°C

0.33

0.47

µF

≤ 125°C

0.68

1.0

µF

ESR

5

500

m

Ω

(1)

All voltages are with respect to the potential at the GND pin.

(2)

Min and Max limits are ensured by design, test, or statistical analysis. Typical numbers are not specifications, but do represent the most

likely norm.

(3)

(4)

The device maintains a stable, regulated output voltage without a load.

(5)

Dropout voltage is the voltage difference between the input and the output at which the output voltage drops to 100 mV below its

nominal value.

(6)

(7)

(8)

Pins 13, 19 can operate from Vin min of 1.74 to a Vin max of 5.5V this rating is only for the series pass pmos power fet. It allows the

system design to use a lower voltage rating if the input voltage comes from a buck output.

(9)

The Iq can be defined as the standing current of the LP3906 when the I2C bus is active and all other power blocks have been disabled

via the I2C bus, or it can be defined as the I2C bus active, and the other power blocks are active under no load condition. These two

values can be used by the system designer when the LP3906 is powered using a battery. If the user plans to use the HW enable pins to

disable each block of the IC please contact the factory applications for IQ details.

(10) The Iq exhibits a higher current draw when the EN pin is de-asserted because the I2C buffer pins draw an additional 2µA

8

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