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DNS10S0A0R20PFB Datasheet(PDF) 11 Page - Delta Electronics, Inc. |
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DNS10S0A0R20PFB Datasheet(HTML) 11 Page - Delta Electronics, Inc. |
11 / 17 page PRELIMINARY DS_DNL10SIP20_10132008 11 FEATURE DESCRIPTIONS (CON.) Table 1 provides Rtrim values required for some common output voltages, while Table 2 provides values of external voltage source, Vtrim, for the same common output voltages. By using a 1% tolerance trim resistor, set point tolerance of ±2% can be achieved as specified in the electrical specification. Table 1 VO (V) Rtrim (KΩ) 0.7525 Open 1.0 41.424 1.2 22.464 1.5 13.047 1.8 9.024 2.0 7.416 2.5 5.009 3.3 3.122 5.0 1.472 Table 2 VO (V) Vtrim (V) 0.7525 Open 1.0 0.6835 1.2 0.670 1.5 0.650 1.8 0.630 2.0 0.6168 2.5 0.583 3.3 0.530 5.0 0.4167 The amount of power delivered by the module is the voltage at the output terminals multiplied by the output current. When using the trim feature, the output voltage of the module can be increased, which at the same output current would increase the power output of the module. Care should be taken to ensure that the maximum output power of the module must not exceed the maximum rated power (Vo.set x Io.max ≤ P max). Voltage Margining Output voltage margining can be implemented in the DNL modules by connecting a resistor, R margin-up, from the Trim pin to the ground pin for margining-up the output voltage and by connecting a resistor, Rmargin-down, from the Trim pin to the output pin for margining-down. Figure 36 shows the circuit configuration for output voltage margining. If unused, leave the trim pin unconnected. A calculation tool is available from the evaluation procedure, which computes the values of Rmargin-up and Rmargin-down for a specific output voltage and margin percentage. Vo On/Off Vin GND Trim Q2 Q1 Rmargin-up Rmargin-down Rtrim Figure 36: Circuit configuration for output voltage margining |
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