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C8051F860-B-GM Datasheet(PDF) 6 Page - Silicon Laboratories |
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C8051F860-B-GM Datasheet(HTML) 6 Page - Silicon Laboratories |
6 / 290 page C8051F85x/86x 6 Preliminary Rev 0.6 24.3.5.SCL High (SMBus Free) Timeout......................................................................232 24.4.Using the SMBus .......................................................................................................232 24.4.1.SMBus Configuration Register ..........................................................................232 24.4.2.SMBus Pin Swap...............................................................................................234 24.4.3.SMBus Timing Control.......................................................................................234 24.4.4.SMB0CN Control Register.................................................................................234 24.4.5.Hardware Slave Address Recognition...............................................................236 24.4.6.Data Register.....................................................................................................236 24.5.SMBus Transfer Modes .............................................................................................237 24.5.1.Write Sequence (Master)...................................................................................237 24.5.2.Read Sequence (Master) ..................................................................................238 24.5.3.Write Sequence (Slave).....................................................................................239 24.5.4.Read Sequence (Slave) ....................................................................................240 24.6.SMBus Status Decoding............................................................................................240 24.7.I2C / SMBus Control Registers..................................................................................245 25.Timers (Timer0, Timer1, Timer2 and Timer3) ................................................................252 25.1.Timer 0 and Timer 1...................................................................................................253 25.1.1.Mode 0: 13-bit Counter/Timer............................................................................254 25.1.2.Mode 1: 16-bit Counter/Timer............................................................................254 25.1.3.Mode 2: 8-bit Counter/Timer with Auto-Reload .................................................255 25.1.4.Mode 3: Two 8-bit Counter/Timers (Timer 0 Only)............................................256 25.2.Timer 2 and Timer 3...................................................................................................257 25.2.1.16-bit Timer with Auto-Reload...........................................................................257 25.2.2.8-bit Timers with Auto-Reload ...........................................................................258 25.2.3.Capture Mode....................................................................................................259 25.3.Timer Control Registers.............................................................................................260 26.Universal Asynchronous Receiver/Transmitter (UART0) ............................................278 26.1.Enhanced Baud Rate Generation..............................................................................278 26.2.Operational Modes.....................................................................................................280 26.2.1.8-Bit UART ........................................................................................................280 26.2.2.9-Bit UART ........................................................................................................281 26.3.Multiprocessor Communications................................................................................282 26.4.UART Control Registers ............................................................................................284 27.Watchdog Timer (WDT0) .................................................................................................288 27.1.Enabling / Resetting the WDT....................................................................................289 27.2.Disabling the WDT.....................................................................................................289 27.3.Disabling the WDT Lockout .......................................................................................289 27.4.Setting the WDT Interval............................................................................................289 27.5.Watchdog Timer Control Registers............................................................................290 28.C2 Interface ......................................................................................................................292 28.1.C2 Pin Sharing...........................................................................................................292 28.2.C2 Interface Registers ...............................................................................................293 Document Change List .........................................................................................................298 Contact Information ..............................................................................................................299 |
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