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ICM7555CN Datasheet(PDF) 5 Page - NXP Semiconductors |
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ICM7555CN Datasheet(HTML) 5 Page - NXP Semiconductors |
5 / 22 page ICM7555_2 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 02 — 3 August 2009 5 of 22 NXP Semiconductors ICM7555 General purpose CMOS timer [1] The supply current value is essentially independent of the TRIGGER, THRESHOLD and RESET voltages. [2] Astable timing is calculated using the following equation: The components are defined in Figure 15. [3] RA, RB = 1 kΩ to 100 kΩ; C = 0.1 µF; 5 V < VDD <15V [4] Parameter is not 100 % tested. II input current TRIGGER VDD =Vtrig =Vmax -50 - pA VDD =Vtrig = 5 V - 10 - pA VDD =Vtrig =Vmin -1 -pA THRESHOLD VDD =Vth =Vmax -50 - pA VDD =Vth =5V - 10 - pA VDD =Vth =Vmin -1 -pA RESET VDD =Vrst =Vmax - 100 - pA VDD =Vrst =5V - 20 - pA VDD =Vrst =Vmin -2 -pA VOL LOW-level output voltage VDD =Vmax; Isink = 3.2 mA - 0.1 0.4 V VDD =5V; Isink = 3.2 mA - 0.2 0.4 V VOH HIGH-level output voltage Isource = −1.0 mA VDD =Vmax 15.25 15.7 - V VDD =5Vmax 4.0 4.5 - V Vo output voltage DISCHARGE: VDD =5V; IDIS =10mA - 0.2 0.4 V tr(o) output rise time[4] RL =10MΩ; CL = 10 pF; VDD =5V -45 75 ns tf(o) output fall time[4] -20 75 ns fosc oscillator frequency astable mode - - 500 kHz Table 5. Characteristics …continued Tamb =25 °C unless otherwise specified. Sym bol Parameter Conditions Min Typ Max Unit f 1.38 R A 2R B + ()C --------------------------------- = |
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