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INA117P-BI Datasheet(PDF) 2 Page - Texas Instruments |
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INA117P-BI Datasheet(HTML) 2 Page - Texas Instruments |
2 / 17 page INA117 SBOS154A 2 SPECIFICATIONS At TA = +25°C, VS = ±15V, unless otherwise noted. INA117AM, SM INA117BM INA117P, KU PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX MIN TYP MAX UNITS GAIN Initial (1) 1 ✻✻ V/V Error 0.01 0.05 ✻ 0.02 ✻✻ % vs Temperature 2 10 ✻✻ ppm/ °C Nonlinearity (2) 0.0002 0.001 ✻✻ ✻ ✻ % OUTPUT Rated Voltage IO = +20mA, –5mA 10 12 ✻✻ ✻✻ V Rated Current VO = 10V +20, –5 ✻✻ mA Impedance 0.01 ✻✻ Ω Current Limit To Common +49, –13 ✻✻ mA Capacitive Load Stable Operation 1000 ✻✻ pF INPUT Impedance Differential 800 ✻✻ k Ω Common-Mode 400 ✻✻ k Ω Voltage Range Differential ±10 ✻✻ V Common-Mode, Continuous ±200 ✻✻ V Common-Mode Rejection (3) DC 70 80 86 94 ✻✻ dB AC, 60Hz VCM = 400Vp-p 66 80 66 94 ✻✻ dB vs Temperature, DC TA = TMIN to TMAX AM, BM, P, KU 66 75 80 90 ✻ dB SM 60 75 dB OFFSET VOLTAGE RTO (4) Initial 120 1000 ✻ 1000 ✻✻ µV KU Grade (SO-8 Package) 600 2000 µV vs Temperature TA = TMIN to TMAX 8.5 40 ✻ 40 ✻ µV/°C vs Supply VS = ±5V to ±18V 74 90 80 ✻ ✻✻✻ dB vs Time 200 ✻✻ µV/mo OUTPUT NOISE VOLTAGE RTO (5) fB = 0.01Hz to 10Hz 25 ✻✻ µVp-p fB = 10kHz 550 ✻✻ nV/ √Hz DYNAMIC RESPONSE Gain Bandwidth, –3dB 200 ✻✻ kHz Full Power Bandwidth VO = 20Vp-p 30 ✻✻ kHz Slew Rate 2 2.6 ✻✻ ✻✻ V/ µs Settling Time: 0.1% VO = 10V Step 6.5 ✻✻ µs 0.01% VO = 10V Step 10 ✻✻ µs 0.01% VCM = 10V Step, VDIFF = 0V 4.5 ✻✻ µs POWER SUPPLY Rated ±15 ✻✻ V Voltage Range Derated Performance ±5 ±18 ✻✻ ✻ ✻ V Quiescent Current VO = 0V 1.5 2 ✻✻ ✻ ✻ mA TEMPERATURE RANGE Specification: AM, BM, P, KU –25 +85 ✻✻ –40 +85 °C SM –55 +125 °C Operation –55 +125 ✻✻ –40 +85 °C Storage –65 +150 ✻✻ –55 +125 °C ✻Specification same as for INA117AM. NOTES: (1) Connected as difference amplifier (see Figure 1). (2) Nonlinearity is the maximum peak deviation from the best-fit straight line as a percent of full-scale peak-to-peak output. (3) With zero source impedance (see discussion of common-mode rejection in Application Information section). (4) Includes effects of amplifier’s input bias and offset currents. (5) Includes effects of amplifier’s input current noise and thermal noise contribution of resistor network. |
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