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SPT7830SCS Datasheet(PDF) 2 Page - Fairchild Semiconductor |
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SPT7830SCS Datasheet(HTML) 2 Page - Fairchild Semiconductor |
2 / 8 page 2 12/29/99 SPT7830 ELECTRICAL SPECIFICATIONS TA = +25 °C, VDD = +5.0 V, VIN = 0 to +3 V, fCLK = 35 MHz, fS = 2.5 MSPS, VREF+ = +3.0 V, VREF– = 0.0 V, unless otherwise specified. TEST TEST PARAMETERS CONDITIONS LEVEL MIN TYP MAX UNITS DC ELECTRICAL CHARACTERISTICS DC Performance Resolution 10 Bits Differential Linearity VI ±0.5 ±1.0 LSB Integral Linearity VI ±1.0 ±1.5 LSB No Missing Codes VI Guaranteed Analog Input Input Voltage Range1 IV VREF– +4% VREF+ –6% V Input Resistance VI 5 M Ω Input Capacitance IV 5 pF Input Bandwidth (Small Signal) IV 30 MHz Offset IV –2 +2 % of FSR Gain Error IV –2 +2 % of FSR Reference Input Resistance IV 250 280 350 Ω Voltage Range1 VREF–2 IV –4% 0 VREF+ –∆ V VREF+2 IV VREF– +∆ 2/3 VDD V VREF+ – VREF– (∆) IV 1/10 VDD V Reference Settling Time IV 90 ns Timing Characteristics Maximum Conversion Rate VI 2.5 1.0 MSPS Minimum Conversion Rate IV 1 kSPS Maximum External Clock Rate VI 35 14 MHz Minimum External Clock Rate IV 14 kHz Aperture Delay Time IV 5 ns Aperture Jitter Time IV 5 ps Data Output LSB Hold Time TMIN to TMAX IV 6 8 ns Supply Voltages VDD ...........................................................................+6 V Input Voltages Analog Input ................................................ –0.7 to +6 V VREF+ .......................................................... –0.7 to +6 V VREF– .......................................................... –0.7 to +6 V Clock and SC .............................................. –0.7 to +6 V Output Data Out ................................................................ 10 mA Temperature Operating, ambient ............................... –40 to +85 °C junction ......................................... +175 °C Lead, Soldering (10 seconds) ............................ +300 °C Storage .................................................... –65 to +150 °C Note: 1. Operation at any Absolute Maximum Ratings is not implied. See Electrical Specifications for proper nominal applied conditions in typical applications. 1 Percentages refer to percent of [(VREF+) – (VREF–)] 2 ∆ = Minimum (VREF+ – VREF–) ABSOLUTE MAXIMUM RATING (Beyond which damage may occur)1 |
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