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SPT7863 Datasheet(PDF) 4 Page - Fairchild Semiconductor

Part # SPT7863
Description  10-BIT, 40 MSPS, 160 mW A/D CONVERTER
Download  11 Pages
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Manufacturer  FAIRCHILD [Fairchild Semiconductor]
Direct Link  http://www.fairchildsemi.com
Logo FAIRCHILD - Fairchild Semiconductor

SPT7863 Datasheet(HTML) 4 Page - Fairchild Semiconductor

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8/21/01
SPT7863
APERTURE DELAY
Aperture delay represents the point in time, relative to the
rising edge of the CLOCK input, that the analog input is
sampled.
APERTURE JITTER
The variations in aperture delay for successive samples.
CLOCK DUTY CYCLE
Ratio of positive clock time (tCH) to total clock period (tCLK)
times 100%.
DIFFERENTIAL LINEARITY ERROR (DLE)
Error in the width of each code from its theoretical value.
(Theoretical = VFS/2N)
INTEGRAL LINEARITY ERROR (ILE)
Linearity error refers to the deviation of each individual
code (normalized) from a straight line drawn from –FS
through +FS. The deviation is measured from the edge of
each particular code to the true straight line.
OUTPUT DELAY
Time between the clock’s triggering edge and output data
valid.
OVERVOLTAGE RECOVERY TIME
The time required for the ADC to recover to full accuracy
after an analog input signal 125% of full scale is reduced
to 50% of the full-scale value.
SIGNAL-TO-NOISE RATIO (SNR)
The ratio of the fundamental sinusoid power to the total
noise power. Harmonics are excluded.
SIGNAL-TO-NOISE AND DISTORTION (SINAD)
The ratio of the fundamental sinusoid power to the total
noise and distortion power.
TOTAL HARMONIC DISTORTION (THD)
The ratio of the total power of the first 9 harmonics to the
power of the measured sinusoidal signal.
SPURIOUS FREE DYNAMIC RANGE (SFDR)
The ratio of the fundamental sinusoidal amplitude to the
single largest harmonic or spurious signal.
N =
SINAD – 1.76
6.02
SPECIFICATION DEFINITIONS
DIFFERENTIAL GAIN (DG)
A signal consisting of a sine wave superimposed on vari-
ous DC levels is applied to the input. Differential gain is the
maximum variation in the sampled sine wave amplitudes
at these DC levels.
DIFFERENTIAL PHASE (DP)
A signal consisting of a sine wave superimposed on vari-
ous DC levels is applied to the input. Differential phase is
the maximum variation in the sampled sine wave phases
at these DC levels.
EFFECTIVE NUMBER OF BITS (ENOB)
SINAD = 6.02N + 1.76, where N is equal to the effective
number of bits.
Duty Cycle =
tCH
tCLK
X 100%
INPUT BANDWIDTH
Small signal (50 mV) bandwidth (3 dB) of analog input
stage.


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