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PCA8536ATQ900 Datasheet(PDF) 6 Page - NXP Semiconductors |
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PCA8536ATQ900 Datasheet(HTML) 6 Page - NXP Semiconductors |
6 / 74 page PCA8536 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved. Product data sheet Rev. 2 — 21 February 2012 6 of 74 NXP Semiconductors PCA8536 Automotive LCD low multiplex driver with 6 channel PWM generator 7.2 Pin description [1] VLCD must be equal to or greater than VDD. [2] Effect of backplane swapping is illustrated in Figure 5 on page 10. [3] Bit BPS is explained in Section 8.1.4 on page 9. Table 3. Pin description of PCA8536AT and PCA8536BT Pin Symbol Type Description 1 to 11 S9 to S19 output LCD segment 20 to 31 S20 to S31 output LCD segment 43 RESET input active LOW reset input 44 VSS supply ground supply voltage 45 VDD supply supply voltage 46 OSCCLK input/output external clock input/internal oscillator output 47 VLCD[1] supply LCD supply voltage 48 to 53 S0/GP0 to S5/GP5 output LCD segment/GPO (PWM) output 54 to 56 S6 to S8 output LCD segment Pin layout depending on backplane swap configuration[2] BPS = 0 BPS = 1[3] 12 BP0 S32 output LCD backplane/LCD segment 13 BP1 S33 14 BP2 S34 15 BP3 S35 16 BP4/S43 S36 17 BP5/S42 S37 18 BP6/S41 S38 19 BP7/S40 S39 32 S32 BP7/S40 33 S33 BP6/S41 34 S34 BP5/S42 35 S35 BP4/S43 36 S36 BP3 37 S37 BP2 38 S38 BP1 39 S39 BP0 Pin layout depending on product and bus type PCA8536AT PCA8536BT 40 A0 input I2C-bus slave address selection CE input SPI-bus chip enable - active LOW 41 SCL input I2C-bus serial clock SCL input SPI-bus serial clock 42 SDA input/output I2C-bus serial data SDI input SPI-bus data input |
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