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PCF8536AT Datasheet(PDF) 10 Page - NXP Semiconductors |
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PCF8536AT Datasheet(HTML) 10 Page - NXP Semiconductors |
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10 / 74 page  PCF8536 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved. Product data sheet Rev. 2 — 21 February 2012 10 of 74 NXP Semiconductors PCF8536 Universal LCD low multiplex driver with 6 channel PWM generator 8.1.4.2 Line inversion (driving scheme A) and frame inversion (driving scheme B) The DC offset of the voltage across the LCD is compensated over a certain period: line-wise in line inversion mode (driving scheme A) or frame-wise in frame inversion mode (driving scheme B). With the INV bit (see Table 8), the compensation mode can be switched. In frame inversion mode, the DC value is compensated across two frames and not within one frame. Changing the inversion mode to frame inversion reduces the power consumption; therefore it is useful when power consumption is a key point in the application. Frame inversion may not be suitable for all applications. The RMS voltage across a segment is better defined; however, since the switching frequency is reduced, there is possibility for flicker to occur. The waveforms of Figure 15 on page 29 to Figure 18 on page 32 are showing line inversion mode. Figure 19 on page 33 shows an example of frame inversion. 8.1.4.3 Power-down mode The power-down bit (PD) allows the PCF8536 to be put in a minimum power configuration. In order to avoid display artefacts, it is recommended to enter power-down only after the display has been switched off by setting bit E to logic 0. During power-down, the internal oscillator is switched off and any selected PWM output is revert to the static value stored in bits GPO0 to GPO5. These bits may be programmed to give a static logic 0 or static logic 1 on selected GP0 to GP5 pins. Fig 5. Effect of backplane swapping BP0 BP1 BP2 BP3 BP4/S43 BP5/S42 BP6/S41 S39 BP7/S40 S38 S20 S37 S21 S36 S22 S35 S23 S34 S24 S33 S25 S32 S26 S31 S27 S30 S28 S29 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 39 38 37 36 35 34 33 32 31 30 29 S32 S33 S34 S35 S36 S37 S38 BP0 S39 BP1 S20 BP2 S21 BP3 S22 BP4/S43 S23 BP5/S42 S24 BP6/S41 S25 BP7/S40 S26 S31 S27 S30 S28 S29 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 39 38 37 36 35 34 33 32 31 30 29 BPS = 0 BPS = 1 013aaa432 |
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