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RT0402DKB0710RL Datasheet(PDF) 4 Page - YAGEO Corporation |
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RT0402DKB0710RL Datasheet(HTML) 4 Page - YAGEO Corporation |
4 / 10 page Chip Resistor Surface Mount www.yageo.com Oct 21, 2009 V.4 Product specification 4 10 SERIES RT 0402 to 2512 (RoHS Compliant) protective coat marking layer resistive layer inner electrode termination (Ni / matte tin) ceramic substrate H I2 YNSC064 W L I1 MARKING RT0805 / RT1206 / RT1210 / RT2010 / RT2512 Either resistance in E-24 or E-96: 4 digits First three digits for significant figure and 4th digit for number of zeros RT0603 E-24 series: 3 digits First two digits for significant figure and 3rd digit for number of zeros E-96 series: 3 digits for 0603±1% EIA-96 marking method RT0402 / RESISTANCE VALUE IS NOT IN E-24 / E96 SERIES No marking For further marking information, please see special data sheet “Chip resistors marking”. Fig. 1 Value = 10 kΩ YNSC004 00 Fig. 2 Value = 12 kΩ ynsc015 Fig. 3 Value = 12.4 kΩ Fig. 4 ynsc007 Fig. 5 Chip resistor outlines O OU UT TL LIIN NE ES S For dimension see Table 1 CONSTRUCTION The resistors are constructed out of a high-grade ceramic body. Internal metal electrodes are added at each end and connected by a resistive layer. The resistive layer is adjusted to give the approximate required resistance and laser cutting of this resistive layer that achieves tolerance trims the value. The resistive layer is covered with a protective coat and printed with the resistance value. Finally, the two external terminations (matte tin) are added. See fig. 5. DIMENSION TYPE L (mm) W (mm) H (mm) I1 (mm) I2 (mm) RT0402 1.00 ±0.10 0.50 ±0.05 0.30 ±0.05 0.20 ±0.10 0.25 ±0.10 RT0603 1.60 ±0.10 0.80 ±0.10 0.45 ±0.10 0.25 ±0.15 0.25 ±0.15 RT0805 2.00 ±0.10 1.25 ±0.10 0.50 ±0.10 0.35 ±0.20 0.35 ±0.20 RT1206 3.10 ±0.10 1.60 ±0.10 0.55 ±0.10 0.45 ±0.20 0.40 ±0.20 RT1210 3.10 ±0.10 2.60 ±0.15 0.55 ±0.10 0.50 ±0.20 0.50 ±0.20 RT2010 5.00 ±0.10 2.50 ±0.15 0.55 ±0.10 0.60 ±0.20 0.50 ±0.20 RT2512 6.35 ±0.10 3.20 ±0.15 0.55 ±0.10 0.60 ±0.20 0.50 ±0.20 Table 1 For outlines see fig. 5 |
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