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AD7729 Datasheet(PDF) 5 Page - Analog Devices

Part # AD7729
Description  Dual Sigma-Delta ADC with Auxiliary DAC
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD7729 Datasheet(HTML) 5 Page - Analog Devices

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AD7729
–5–
REV. 0
TIMING DIAGRAMS
t10
ASE (I)
ASCLK (O)
ASDIFS (I)
ASDOFS (O)
ASDI (I)
ASDO (O)
THREE-STATE
THREE-STATE
THREE-STATE
D9
D8
A1
A0
D9
D8
D7
D8
D9
A0
A1
A2
D9
t10
t11
t13
t12
t14
t15
t16
NOTE
I = INPUT, O = OUTPUT
t17
t11
Figure 6. Auxiliary Serial Port ASPORT
t18
BSE (I)
BSCLK (O)
BSDIFS (I)
BSDOFS (O)
BSDI (I)
BSDO (O)
THREE-STATE
THREE-STATE
THREE-STATE
D9
D8
A1
A0
D9
D8
D7
D8
D9
A0
A1
A2
D9
t18
t19
t19
t21
t20
t22
t23
t24
NOTE
I = INPUT, O = OUTPUT
t25
Figure 7. Baseband Serial Port BSPORT
t1
t2
t3
Figure 2. Clock Timing
100 AIOL
TO OUTPUT PIN
+2.1V
100 A
IOH
CL
15pF
Figure 3. Load Circuit for Timing Specifications
t6
t4
t1
t3
t2
t5
MCLK
*ASCLK
*ASCLK IS INDIVIDUALLY PROGRAMMABLE IN FREQUENCY
(MCLK/4 SHOWN HERE).
Figure 4. ASCLK
t9
t7
t1
t3
t2
t8
MCLK
*BSCLK
*BSCLK IS INDIVIDUALLY PROGRAMMABLE IN FREQUENCY
(MCLK/4 SHOWN HERE).
Figure 5. BSCLK


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