TMC22X5YA datasheet(3/84 Pages) FAIRCHILD

Part #	TMC22X5YA

Description	Multistandard Digital Video Decoder Three-Line Adaptive Comb Decoder Family, 8 & 10 bit

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Manufacturer	FAIRCHILD [Fairchild Semiconductor]

Direct Link	http://www.fairchildsemi.com

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PRODUCT SPECIFICATION

TMC22x5yA

REV. 1.0.0 2/4/03

3

List of Tables and Figures

Table 1.

TMC22x5yA Decoder Family ................. 4

Table 2.

Normalized Subcarrier Frequency

as a Function of Pixel Data Rates....... 45

Table 3.

Comb Filter Architecture ..................... 48

Table 4.

Simple Example of an Adaptive

Comb Filter Architecture ..................... 48

Table 5.

Adaption Modes ................................... 51

Table 6.

XLUT Input Selection ........................... 52

Table 7.

XLUT Output Function ......................... 52

Table 8.

XLUT Special Function Definitions..... 52

Table 9.

PAL-B,G,H,I Bruch

Blanking Sequence .............................. 53

Table 10. PAL-M Bruch Blanking Sequence ...... 54

Table 11. Blanking Level Selection ..................... 55

Table 12. Adaptive Notch Threshold Control..... 55

Table 13. Matrix Limiters...................................... 57

Table 14. Output Format ...................................... 58

Table 15. NTSC Field and Line Numbering ........ 59

Table 16. PAL B,G,H,I Field and

Line Numbering .................................... 59

Table 17. PAL M Field and Line Numbering ....... 59

Table 18. Vertical Blanking Period ...................... 60

Table 19. Vertical Burst Blanking Period............ 60

Table 20. Table of Line Idents, LID[4:0] .............. 60

Table 21. Timing Offsets ...................................... 61

Table 22. PAL VINDO operation .......................... 63

Table 23. Pixel Grab Control................................ 66

Table 24. Parallel Port Control............................. 67

Table 25. Serial Port Addresses .......................... 69

Figure 1.

Logic Symbol.......................................... 4

Figure 2.

Pixel Data Format ................................... 4

Figure 3.

Fundamental Decoder

Block Diagram ...................................... 40

Figure 4.

Comparison of the Frequency

Spectrum of NTSC and PAL

Composite Video Signals .................... 40

Figure 5.

Examples of Notch and Bandpass

Filters..................................................... 41

Figure 6.

............................................................... 41

Figure 7.

Chrominance Vector Rotation in

PAL and NTSC ...................................... 42

Figure 8.

Chrominance Vector Rotation Over

4 Fields in NTSC ................................... 42

Figure 9.

Chrominance Vector Rotation Over

4 Fields in PAL...................................... 42

Figure 10. TMC22x5yA Line Based Comb

Filter Architecture ................................ 43

Figure 11. Input Processor .................................... 44

Figure 12. Complementary Bandsplit Filter ......... 44

Figure 13. Bandsplit Filter, Full Frequency

Response .............................................. 45

Figure 14. Bandsplit Filter, Passband

Response .............................................. 45

Figure 15. Block Diagram of Comb Filter Input ... 46

Figure 16. Signal Flow Around the Adaptive

Comb Filter ........................................... 47

Figure 17. Example of a Comb Fail Using a NTSC

Two Line Comb Filter........................... 49

Figure 18. Generation of Upper and Lower Comb

Fail Signals ........................................... 50

Figure 19. Comb Filter Selection .......................... 51

Figure 20. XLUT Input Selection ........................... 52

Figure 21. Block Diagram of Digital Burst

Locked Loop ......................................... 53

Figure 22. Gaussian Low Pass Filters.................. 54

Figure 23. Gaussian LPF Passband Detail........... 54

Figure 24. Output Processor Block Diagram....... 55

Figure 25. Adaptive Notch Filters ......................... 56

Figure 26. Luminance Notch Filter ....................... 56

Figure 27. Horizontal Timing ................................. 61

Figure 28. External HSYNC and VSYNC Timing

for Field 1(3, 5, or 7) ............................. 62

Figure 29. NTSC Vertical Interval.......................... 62

Figure 30. PAL-B,G,H,I,N Vertical Interval............ 62

Figure 31. PAL-M Vertical Interval ........................ 63

Figure 32. Pixel Grab Locations............................ 64

Figure 33. Relationship Between Pixel Count

and Pixel Grab Value............................ 65

Figure 34. Microprocessor Parallel Port –

Write Timing.......................................... 66

Figure 35. Microprocessor Parallel Port –

Read Timing.......................................... 68

Figure 36. Serial Port Read/Write Timing............. 69

Figure 37. Serial Interface –

Typical Byte Transfer........................... 70

Figure 38. Equivalent Digital Input Circuit ........... 71

Figure 39. Equivalent Digital Output .................... 71

Figure 40. Threshold Levels for Three-state........ 71

Figure 41. Input Timing Parameters ..................... 72

Figure 42. Functional Block Diagram of the

TMC22x5yA G/Y, B/U, and R/V Output

Stage...................................................... 73

Figure 43. Output Timing Parameters .................. 74

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