8

ATmega165A/PA/325A/PA/3250A/PA/645A/P/6450A/P [SUMMARY]

8285ES–AVR–02/2013

2.3.11

Port J (PJ6:PJ0)

Port J is a 7-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The Port J output buffers

have symmetrical drive characteristics with both high sink and source capability. As inputs, Port J pins that are

externally pulled low will source current if the pull-up resistors are activated. The Port J pins are tri-stated when a

reset condition becomes active, even if the clock is not running.

Port J also serves the functions of various special features of the Atmel ATmega3250A/3250PA/6450A/6450P as

2.3.12

RESET

Reset input. A low level on this pin for longer than the minimum pulse length will generate a reset, even if the clock

to generate a reset.

2.3.13

XTAL1

Input to the inverting Oscillator amplifier and input to the internal clock operating circuit.

2.3.14

XTAL2

Output from the inverting Oscillator amplifier.

2.3.15

AVCC

AVCC is the supply voltage pin for Port F and the A/D Converter. It should be externally connected to V

the ADC is not used. If the ADC is used, it should be connected to V

2.3.16

AREF

This is the analog reference pin for the A/D Converter.