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APL3215QBI-TRG Datasheet(PDF) 10 Page - Anpec Electronics Coropration |
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APL3215QBI-TRG Datasheet(HTML) 10 Page - Anpec Electronics Coropration |
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10 / 18 page  Copyright © ANPEC Electronics Corp. Rev. A.1 - Sep., 2011 APL3215/A www.anpec.com.tw 10 Function Description ACIN Power-On-Reset (POR) The APL3215/A has a built-in power-on-reset circuit to keep the output shutting off until internal circuitry is oper- ating properly. The POR circuit has hysteresis and a de- glitch feature so that it will typically ignore undershoot transients on the input. When the input voltage exceeds the POR threshold and after 8ms blanking time, the out- put voltage starts a soft-start to reduce the inrush current. ACIN Over-Voltage Protection (OVP) The input voltage is monitored by the internal OVP circuit. When the input voltage rises above the input OVP threshold, the internal FET will be turned off within 1 µs to protect connected system on OUT pin. When the input voltage returns below the input OVP threshold minus the hysteresis, the FET is turned on again after 8ms recovery time. The input OVP circuit has a 300mV hysteresis and a recovery time of T ON(OVP) to provide noise immunity against transient conditions. Over-Current Protection (OCP) The output current is monitored by the internal OCP circuit. When the output current reaches the OCP threshold, the device limits the output current at OCP threshold level. If the OCP condition continues for a blanking time of T B(OCP), the internal power FET is turned off. After the recovery time of T ON(OCP), the FET will be turned on again. The APL3215/A has a built-in counter. When the total count of OCP fault reaches 16, the FET is turned off permanently, requiring a V ACIN POR again to restart. Battery Over-Voltage Protection The APL3215/A monitors the VBAT pin voltage for battery over-voltage protection. The battery OVP threshold is in- ternally set to 4.35V. When the VBAT pin voltage exceeds the battery OVP threshold for a blanking time of T B(BOVP), the internal power FET is turned off. When the VBAT volt- age returns below the battery OVP threshold minus the hysteresis, the FET is turned on again. The APL3215/A has a built-in counter. When the total count of battery OVP fault reaches 16, the FET is turned off permanently, re- quiring a V ACIN POR again to restart. Over-Temperature Protection When the junction temperature exceeds 160oC, the inter- nal thermal sense circuit turns off the power FET and allows the device to cool down. When the device’s junc- tion temperature cools by 40oC, the internal thermal sense circuit will enable the device, resulting in a pulsed output during continuous thermal protection. Thermal pro- tection is designed to protect the IC in the event of over- temperature conditions. For normal operation, the junc- tion temperature cannot exceed T J=+125 oC. Internal P-MOSFET The APL3215/A integrates a P-channel MOSFET with the body diode reverse protection to replace the external P- MOSFET and Schottky diode for cell phone’s PMIC. The body diode reverse protection prevents a reverse current flowing from the battery back to CHRIN pin. During power- on, when CHRIN voltage rises above the VBAT voltage by more than 150mV, the body diode of the P-channel MOSFET is forward biased from OUT to CHRIN, and P- MOSFET is controlled by the external GATDRV voltage. When the CHRIN voltage drops below V BAT+20mV, the body diode of the P-channel MOSFET is forward biased from CHRIN to OUT and P-channel MOSFET is turned off. When any of input OVP, OCP, battery OVP, is detected, the internal P-channel MOSFET is also turned off. The APL3215/A VIN input pin fully supports the IEC61000-4-2. That means the VIN pin has immunity of ±15kV ESD discharge in Air condition, and immunity of ±8kV ESD discharge in Contact condition. ESD Tests |
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