ISO1050

SLLS983H – JUNE 2009 – REVISED JUNE 2013

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DRIVER AND RECEIVER FUNCTION TABLES

Table 1. Driver Function Table

INPUT

OUTPUTS

DRIVEN BUS STATE

L

H

L

Dominant

H

Z

Z

Recessive

(1)

for bus state and common mode bias information.

Table 2. Receiver Function Table

CAN DIFFERENTIAL INPUTS

DEVICE MODE

BUS STATE

Dominant

L

?

?

Normal or Silent

Recessive

H

Open

H

(1)

H = high level, L = low level, ? = indeterminate.

DIGITAL INPUTS AND OUTPUTS

TXD (Input) and RXD (Output):

the digital inputs and outputs are 3.3 V and 5 V compatible.

NOTE

used to make sure that TXD is biased to recessive (high) level to avoid issues on the bus

if the microprocessor doesn't control the pin and TXD floats. TXD pullup strength and CAN

bit timing require special consideration when the device is used with an open-drain TXD

output on the microprocessor's CAN controller. An adequate external pullup resistor must

be used to ensure that the TXD output of the microprocessor maintains adequate bit

timing input to the input on the transceiver.

PROTECTION FEATURES

TXD Dominant Timeout (DTO)

TXD DTO circuit prevents the local node from blocking network communication in the event of a hardware or

starts on a falling edge on TXD. The TXD DTO circuit disables the CAN bus driver if no rising edge is seen

before the timeout period expires. This frees the bus for communication between other nodes on the network.

The CAN driver is re-activated when a recessive signal is seen on the TXD pin, thus clearing the TXD DTO

condition. The receiver and RXD pin still reflect the CAN bus, and the bus pins are biased to recessive level

during a TXD dominant timeout.

NOTE

The minimum dominant TXD time allowed by the TXD DTO circuit limits the minimum

possible transmitted data rate of the device. The CAN protocol allows a maximum of

eleven successive dominant bits (on TXD) for the worst case, where five successive

minimum, limits the minimum data rate. Calculate the minimum transmitted data rate by:

4

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