AD9559PCBZ datasheet(8/120 Pages) AD

Part #	AD9559PCBZ

Description	Dual PLL, Quad Input, Multiservice Line Card Adaptive Clock Translator

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Manufacturer	AD [Analog Devices]

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8 / 120 page

AD9559

Data Sheet

Rev. 0 | Page 8 of 120

DISTRIBUTION CLOCK OUTPUTS

Table 8.

Parameter

Min

Typ

Max

Unit

Test Conditions/Comments

HSTL MODE

Output Frequency

OUT0A, OUT0A and OUT0B, OUT0B

0.262

1250

MHz

OUT1A, OUT1A and OUT1B, OUT1B

0.302

1250

MHz

Rise/Fall Time (20% to 80%)1

140

250

ps

100 Ω termination across the output pair

Duty Cycle

Up to fOUT = 700 MHz

44

48

53

%

Up to fOUT = 750 MHz

43

48

54

%

Up to fOUT = 1250 MHz

43

%

Differential Output Voltage Swing

700

925

1200

mV

Magnitude of voltage across pins; output

driver static

Common-Mode Output Voltage

750

850

1000

mV

Output driver static

Reference Input-to-Output Delay Variation

over Temperature

3.2

ps/°C

HSTL mode; DPLL locked to same input

reference at all times; stable system clock

source (non-XTAL)

Static Phase Offset Variation from Active

Reference to Output over Voltage

Extremes

0.875

ps/mV

Valid for HSTL, LVDS, and 1.8 V CMOS output

driver modes

LVDS MODE

Output Frequency

OUT0A, OUT0A and OUT0B, OUT0B

0.262

1250

MHz

OUT1A, OUT1A and OUT1B, OUT1B

0.302

1250

MHz

Rise/Fall Time (20% to 80%)1

185

280

ps

100 Ω termination across the output pair

Duty Cycle

Up to fOUT = 750 MHz

43

48

53

%

Up to fOUT = 800 MHz

42.5

48

53.5

%

Up to fOUT = 1250 MHz

43

%

Differential Output Voltage Swing

Balanced, VOD

247

454

mV

Voltage swing between output pins; output

driver static

Unbalanced, ΔVOD

50

mV

Absolute difference between voltage swing of

normal pin and inverted pin; output driver static

Offset Voltage

Common Mode, VOS

1.125

1.25

1.375

V

Output driver static

Common-Mode Difference, ΔVOS

50

mV

Voltage difference between pins; output driver

static

Short-Circuit Output Current

10

24

mA

Output driver static

CMOS MODE

Output Frequency

1.8 V Supply

OUT0A, OUT0A and OUT0B, OUT0B

0.262

250

MHz

10 pF load

OUT1A, OUT1A and OUT1B, OUT1B

0.302

250

MHz

10 pF load

3.3 V Supply (OUT0A and OUT1A)

Strong Drive Strength Setting

OUT0A, OUT0A

0.262

250

MHz

10 pF load

OUT1A, OUT1A

0.302

250

MHz

10 pF load

Weak Drive Strength Setting

OUT0A, OUT0A

0.262

25

MHz

10 pF load

OUT1A, OUT1A

0.302

25

MHz

10 pF load

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