1 kΩ

8 V

Input

Input

100 kΩ

4 kΩ

18 kΩ

4 kΩ

16 V

16 V

Input

100 kΩ

4 kΩ

18 kΩ

4 kΩ

16 V

16 V

16 V

16 V

Output

Output

D Inputs

A Input

B Input

Y AND Z Outputs

R Output

40 Ω

8 V

100 kΩ

Receiver

Receiver

SN65LBC179A

SN75LBC179A

SLLS377D

– MAY 2000 – REVISED SEPTEMBER 2011

www.ti.com

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

AVAILABLE OPTIONS

PACKAGE

SMALL OUTLINE

PLASTIC

(D)

DUAL-IN-LINE

0

°C to 70°C

SN75LBC179AD

SN75LBC179AP

–40°C to 85°C

SN65LBC179AD

SN65LBC179AP

SCHEMATICS OF INPUTS AND OUTPUTS

2

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© 2000–2011, Texas Instruments Incorporated

Product Folder Link(s): SN65LBC179A SN75LBC179A