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TLC7701MPWREP Datasheet(PDF) 2 Page - Texas Instruments |
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TLC7701MPWREP Datasheet(HTML) 2 Page - Texas Instruments |
2 / 18 page 6 1 3 2 7 SENSE ≥1 ≥1 ≥1 RESET 5 COMP S VIT S<VIT Z1 Z2 Z3 RESIN CT CONTROL RESET 3 2 1 1 CX × TLC7701-EP, TLC7705-EP, TLC7733-EP SGLS013E – MARCH 2003 – REVISED NOVEMBER 2011 www.ti.com In addition to the power-on reset and undervoltage-supervisor function, the TLC77xx adds power-down control support for static RAM. When CONTROL is tied to GND, RESET will act as active high. The voltage monitor contains additional logic intended for control of static memories with battery backup during power failure. By driving the chip select (CS) of the memory circuit with the RESET output of the TLC77xx and with the CONTROL driven by the memory bank select signal (CSH1) of the microprocessor (see Figure 11), the memory circuit is automatically disabled during a power loss. (In this application the TLC77xx power has to be supplied by the battery.) ORDERING INFORMATION ORDERABLE PART TOP-SIDE TA PACKAGE(1) VID NUMBER NUMBER MARKING TLC7701QPWREP 7701QE V62/04604 - 01XE -40 °C to 125°C TSSOP - PW Tape and reel TLC7705QPWREP 7705QE V62/04604 - 02XE TLC7733QPWREP 7733QE V62/04604 - 03XE TLC7701MPWREP 7701ME V62/04604 - 04XE TSSOP - PW Tape and reel -55 °C to 125°C TLC7733MPWREP 7733ME V62/04604 - 06XE SOIC - D Tape and reel TLC7701MDREP 7701ME V62/04604 - 04YE (1) The PW package is only available left-end taped and reeled (indicated by the R suffix on the device type; e.g., TLC7701QPWREP). Table 1. FUNCTION TABLE CONTROL RESIN VI(SENSE) > VIT+ RESET RESET L L False H L L L True H L L H False H L L H True L(1) H(1) H L False H L H L True H L H H False H L H H True H H(1) (1) RESET and RESET states shown are valid for t > td. (1) This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. Figure 1. Logic Symbol 2 Submit Documentation Feedback Copyright © 2003–2011, Texas Instruments Incorporated Product Folder Link(s): TLC7701-EP TLC7705-EP TLC7733-EP |
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